公开(公告)号：US08284953B2

公开(公告)日：2012-10-09

申请号：US11873179

申请日：2007-10-16

申请人： Soo-Hyoung Lee ,  Wang-Seup Yeum ,  Yong-Jin Cho ,  In-Bock Lee

发明人： Soo-Hyoung Lee ,  Wang-Seup Yeum ,  Yong-Jin Cho ,  In-Bock Lee

IPC分类号： H04B15/00 ,  H03G11/00 ,  H04R29/00 ,  H02B1/00 ,  H03F1/14 ,  H03F3/38

CPC分类号： H03F3/217 ,  H03F1/305 ,  H03F2200/03 ,  H03F2200/351 ,  H03K17/162

摘要： A circuit of reducing a pop-up noise in a digital amplifier includes a switch unit and a switch signal generator. The switch unit is coupled in parallel to an output load between an output node of the digital amplifier and a reference node. The switch unit controls a current flowing through the output load by forming a conduction path between the output node and the reference node in response to a switch signal. The switch signal generator generates the switch signal in response to a switch control signal indicating a power-on or a power-off. The pop-up noise is reduced by the conduction path that is formed when the digital amplifier is powered on or off.

摘要翻译： 减少数字放大器中的弹出噪声的电路包括开关单元和开关信号发生器。 开关单元与数字放大器的输出节点和参考节点之间的输出负载并联耦合。 开关单元响应于开关信号，在输出节点和参考节点之间形成传导路径来控制流过输出负载的电流。 开关信号发生器响应于指示电源接通或断电的开关控制信号而产生开关信号。 通过在数字放大器通电或关闭时形成的传导路径来减小弹出式噪声。

公开(公告)号：US20080089532A1

公开(公告)日：2008-04-17

申请号：US11873179

申请日：2007-10-16

申请人： Soo-Hyoung Lee ,  Wang-Seup Yeum ,  Yong-Jin Cho ,  In-Bock Lee

发明人： Soo-Hyoung Lee ,  Wang-Seup Yeum ,  Yong-Jin Cho ,  In-Bock Lee

IPC分类号： H04B15/00

CPC分类号： H03F3/217 ,  H03F1/305 ,  H03F2200/03 ,  H03F2200/351 ,  H03K17/162

摘要： A circuit of reducing a pop-up noise in a digital amplifier includes a switch unit and a switch signal generator. The switch unit is coupled in parallel to an output load between an output node of the digital amplifier and a reference node. The switch unit controls a current flowing through the output load by forming a conduction path between the output node and the reference node in response to a switch signal. The switch signal generator generates the switch signal in response to a switch control signal indicating a power-on or a power-off. The pop-up noise is reduced by the conduction path that is formed when the digital amplifier is powered on or off.

摘要翻译： 减少数字放大器中的弹出噪声的电路包括开关单元和开关信号发生器。 开关单元与数字放大器的输出节点与参考节点之间的输出负载并联耦合。 开关单元响应于开关信号，在输出节点和参考节点之间形成传导路径来控制流过输出负载的电流。 开关信号发生器响应于指示电源接通或断电的开关控制信号而产生开关信号。 通过在数字放大器通电或关闭时形成的传导路径来减小弹出式噪声。

公开(公告)号：US08362832B2

公开(公告)日：2013-01-29

申请号：US12850782

申请日：2010-08-05

申请人： Bong-Joo Kim ,  Wang-Seup Yeum ,  Yong-Hee Lee ,  Seung-Bin You ,  Chun Kyun Seok

发明人： Bong-Joo Kim ,  Wang-Seup Yeum ,  Yong-Hee Lee ,  Seung-Bin You ,  Chun Kyun Seok

IPC分类号： H03F3/38

CPC分类号： H03F3/2173 ,  H03G3/007

摘要： A half-bridge three-level pulse width modulation (PWM) amplifier includes a prescaling unit, a PWM generator configured to convert the input signal to a three-level PWM signal having a first level, a second level and a reference level and an output stage. The prescaling unit scales an input signal according to at least one gain value to provide a scaled signal. The PWM generator varies the width of pulses having the first level and varies the width of pulses having a second level based on the scaled signal. The output stage drives an output node to a level of a first power supply voltage, a second power supply voltage or a third power supply voltage based on the three-level PWM signal. The output node is connected to a load. The magnitude of the at least one gain value compensates for variations of power supply voltages.

摘要翻译： 半桥三电平脉宽调制（PWM）放大器包括一个预分频单元，一个PWM发生器，被配置为将输入信号转换成具有第一电平，第二电平和参考电平的三电平PWM信号，以及输出 阶段。 预分频单元根据至少一个增益值缩放输入信号以提供缩放信号。 PWM发生器改变具有第一电平的脉冲的宽度，并且基于缩放的信号改变具有第二电平的脉冲的宽度。 输出级基于三电平PWM信号将输出节点驱动到第一电源电压，第二电源电压或第三电源电压的电平。 输出节点连接到一个负载。 至少一个增益值的大小补偿电源电压的变化。

公开(公告)号：US20110064245A1

公开(公告)日：2011-03-17

申请号：US12850782

申请日：2010-08-05

申请人： Bong-Joo Kim ,  Wang-Seup Yeum ,  Yong-Hee Lee ,  Seung-Bin You ,  Chun Kyun Seok

发明人： Bong-Joo Kim ,  Wang-Seup Yeum ,  Yong-Hee Lee ,  Seung-Bin You ,  Chun Kyun Seok

IPC分类号： H03G3/00 ,  H03F1/00

CPC分类号： H03F3/2173 ,  H03G3/007

摘要： A half-bridge three-level pulse width modulation (PWM) amplifier includes a prescaling unit, a PWM generator configured to convert the input signal to a three-level PWM signal having a first level, a second level and a reference level and an output stage. The prescaling unit scales an input signal according to at least one gain value to provide a scaled signal. The PWM generator varies the width of pulses having the first level and varies the width of pulses having a second level based on the scaled signal. The output stage drives an output node to a level of a first power supply voltage, a second power supply voltage or a third power supply voltage based on the three-level PWM signal. The output node is connected to a load. The magnitude of the at least one gain value compensates for variations of power supply voltages.

摘要翻译： 半桥三电平脉宽调制（PWM）放大器包括一个预分频单元，一个PWM发生器，被配置为将输入信号转换成具有第一电平，第二电平和参考电平的三电平PWM信号，以及输出 阶段。 预分频单元根据至少一个增益值缩放输入信号以提供缩放信号。 PWM发生器改变具有第一电平的脉冲的宽度，并且基于缩放的信号改变具有第二电平的脉冲的宽度。 输出级基于三电平PWM信号将输出节点驱动到第一电源电压，第二电源电压或第三电源电压的电平。 输出节点连接到一个负载。 至少一个增益值的大小补偿电源电压的变化。

公开(公告)号：US20110080217A1

公开(公告)日：2011-04-07

申请号：US12845424

申请日：2010-07-28

申请人： Yong-Hee Lee ,  Chun Kyun Seok ,  Wang-Seup Yeum ,  Seung-Bin You ,  Bong-Joo Kim

发明人： Yong-Hee Lee ,  Chun Kyun Seok ,  Wang-Seup Yeum ,  Seung-Bin You ,  Bong-Joo Kim

IPC分类号： H03F3/04 ,  H03F1/00

CPC分类号： H03F3/181 ,  H03F1/30 ,  H03F3/217

摘要： An audio amplifier includes a compensation unit, an output unit and a calibration unit. The compensation unit generates a compensation signal based on a digital input signal, a digital reference code, a mode signal and a digital approximation code. The output unit generates an output signal based on the compensated input signal. The calibration unit generates the digital approximation code based on the output signal and the mode signal. The digital approximation code includes a plurality of bits that are generated sequentially.

摘要翻译： 音频放大器包括补偿单元，输出单元和校准单元。 补偿单元基于数字输入信号，数字参考码，模式信号和数字近似码产生补偿信号。 输出单元基于经补偿的输入信号产生输出信号。 校准单元基于输出信号和模式信号生成数字近似码。 数字近似码包括顺序生成的多个位。