摘要:
An output part outputs a high voltage of a first clock signal as a high voltage of an (m)-th gate signal (‘m’ is a natural number) and a low voltage in response to a high signal of an (m+1)-th gate signal outputted from an (m+1)-th stage. A first maintenance part maintains a control part of the pull-up part at a low voltage in response to an (m−1)-th node signal or an (m+1)-th node signal lower than a high signal of a second clock signal having a phase opposite to the phase of the first clock signal received from an (m−1)-th stage or the (m+1)-th stage. A second maintenance part maintains the low voltage of the (m)-th gate signal in response to the (m−1)-th node signal or the (m+1)-th node signal.
摘要:
A liquid crystal display includes a gate line, a data line crossing the gate line and insulated from the gate line, a common voltage line separated from the gate line and the data line, where the common voltage line transfers a predetermined voltage, a first switching element connected to the gate line and the data line, a second switching element connected to the gate line and the data line, a first liquid crystal capacitor connected to the first switching element, a second liquid crystal capacitor connected to the second switching element and at least two decompressing switching elements connected to the second switching element and the common voltage line.
摘要:
A thin film transistor array panel according to an exemplary embodiment of the present invention comprises a substrate; a first signal line and a second signal line disposed on the substrate; a switching thin film transistor connected to the first signal line and the second signal line, and comprising a first insulating layer; a driving thin film transistor connected to the switching thin film transistor and comprising a second insulating layer; and a discharge thin film transistor connected to one of the first signal line and the second signal line, and comprising the first insulating layer and the second insulating layer.
摘要:
A liquid crystal display includes a gate line; a data line intersecting and insulated from the gate line; a common voltage line separated from the gate line and the data line to transfer a predetermined voltage; a first switching element connected to the gate line and the data line; a second switching element connected to the gate line and the data line; a first liquid crystal capacitor connected to the first switching element; a second liquid crystal capacitor connected to the second switching element; a third switching element that includes an input terminal connected to the second switching element, a floated control terminal, and an output terminal; and a third capacitor connected to the third switching element and the common voltage line.
摘要:
A display device having a plurality of pixels, each pixel includes a light-emitting element, a storage capacitor, a driving transistor, a first switching transistor which supplies a data voltage to the storage capacitor in response to an on-voltage of a scanning signal, a second switching transistor which diode-connects the driving transistor in response to an on-voltage of a compensation signal, and a third switching transistor which supplies a driving voltage to the driving transistor in response to an on-voltage of a light emitting signal. The storage capacitor stores a control voltage depending on a threshold voltage of the driving transistor when the driving transistor is diode-connected, transmits the control voltage and the data voltage to the control terminal of the driving transistor, and a period in which the compensation signal is in an on-voltage state is longer than a period in which the scanning signal is in an on-voltage state.
摘要:
A display substrate includes a gate wire, a data wire which crosses the gate wire, a display part, a dummy pixel part and a test part. The display part includes a pixel element electrically connected to the gate wire and the data wire, and the pixel element includes a display element. The dummy pixel part surrounds the display part to protect the pixel element from static electricity. The test part is formed adjacent to the display part and includes a test element having a test display element formed in a substantially same manner as the display element.
摘要:
A gate driving circuit includes a pull-up control part, a pull-up part, a carry part, a first pull-down part and a second pull-down part. The pull-up control part applies a carry signal from a previous stage to a first node. The pull-up part outputs an N-th gate output signal based on a clock signal. The carry part outputs an N-th carry signal based on the clock signal in response to the signal applied to the first node. The first pull-down part includes a plurality of transistors connected to each other in series. The first pull-down part pulls down a signal at the first node to a second off voltage in response to a carry signal of a next stage. The second pull-down part pulls down the N-th gate output signal to a first off voltage in response to the carry signal of the next stage.
摘要:
A display device includes: an insulation substrate; a plurality of gate lines on the insulation substrate and divided into a first group and a second group; a plurality of data lines insulated from and intersecting the gate lines; a gate driver which applies a gate-on voltage to the gate lines and operates in one of a first mode and a second mode; and a data driver which applies a data voltage to the data lines, where the first group and the second group of the gate lines are applied with the gate-on voltage when the gate driver is in the first mode, and where the first group of the gate lines is applied with the gate-on voltage and the second group of the gate lines is in an off state when the gate driver is in the second mode.
摘要:
An exemplary embodiment of the present invention discloses a display substrate including a pixel connected to a first gate line and a data line. The pixel includes a first sub-pixel including a first liquid crystal capacitor and a first switching element including a gate electrode connected to the first gate line, a source electrode connected to the data line, and a drain electrode connected to the first liquid crystal capacitor. The pixel also includes a second sub-pixel including a second liquid crystal capacitor and a second switching element including a gate electrode connected to the first gate line, a source electrode connected to the data line, and a drain electrode connected to the second liquid crystal capacitor. The pixel further includes a controller including a control capacitor and a control switching element, the control switching element connected between a terminal of the control capacitor and the drain electrode of the second switching element. The control capacitor includes a first capacitor electrode and a second capacitor electrode. The first capacitor electrode is arranged on the same level on the display substrate as the gate electrode or is arranged on the same level on the display substrate as the source electrode and the drain electrode. The second capacitor electrode is arranged on the same level on the display substrate as a pixel electrode.
摘要:
A liquid crystal display comprising a plurality of pixels, each pixel of the plurality of pixels comprises a gate line which receives a gate signal; a data line which receives a data voltage; a first sub-pixel comprising a first transistor connected to the gate line and the data line, wherein the first transistor outputs the data voltage in response to the gate signal; and a first liquid crystal capacitor connected to the first transistor, wherein the first liquid crystal capacitor receives the data voltage output from the first transistor; a second sub-pixel comprising a second transistor connected to the gate line and the data line, wherein the second transistor outputs the data voltage in response to the gate signal; and a second liquid crystal capacitor connected to the second transistor, wherein the second liquid crystal capacitor receives the data voltage output from the second transistor; a resistor connected to the second transistor, wherein the resistor receives the data voltage output from the second transistor; and a first sharing capacitor connected to the resistor, wherein the first sharing capacitor receives the data voltage through the resistor.