公开(公告)号：US08787089B2

公开(公告)日：2014-07-22

申请号：US13692736

申请日：2012-12-03

Applicant: Spansion LLC

Inventor： Masaru Yano ,  Kazuhide Kurosaki ,  Mototada Sakashita

IPC: G11C16/04 ,  G11C5/06 ,  G11C7/00 ,  G11C5/02 ,  G11C16/24 ,  G11C7/18

CPC classification number: G11C16/0483 ,  G11C5/02 ,  G11C5/06 ,  G11C7/18 ,  G11C16/0408 ,  G11C16/0491 ,  G11C16/24 ,  G11C16/30

Abstract: An embodiment of the invention provides a semiconductor device that includes: a memory cell array that includes non-volatile memory cells; a first selecting circuit that connects or disconnects a source and a drain of a transistor that forms one of the memory cells, to or from a data line DATAB connected to a first power supply; and a second selecting circuit that connects or disconnects the source and drain to or from a ground line ARVSS connected to a second power supply. In this semiconductor device, the first selecting circuit and the second selecting circuit are arranged on the opposite sides of the memory cell array. One embodiment of the invention also provides a method of controlling the semiconductor device.

Abstract translation: 本发明的实施例提供一种半导体器件，其包括：包括非易失性存储器单元的存储单元阵列; 第一选择电路，连接或断开与形成其中一个存储单元的晶体管的源极和漏极连接到连接到第一电源的数据线DATAB; 以及第二选择电路，其将源极和漏极连接到或连接到连接到第二电源的地线ARVSS或从其断开。 在该半导体装置中，第一选择电路和第二选择电路配置在存储单元阵列的相对侧。 本发明的一个实施例还提供了一种控制半导体器件的方法。