公开(公告)号：US20050105353A1

公开(公告)日：2005-05-19

申请号：US10954642

申请日：2004-09-30

申请人： Stefan Trost ,  Georg Tempel ,  Matthias Ernst ,  Martin Steinbruck

发明人： Stefan Trost ,  Georg Tempel ,  Matthias Ernst ,  Martin Steinbruck

IPC分类号： G11C16/02 ,  G11C11/34 ,  G11C16/04 ,  G11C16/06 ,  G11C16/10 ,  G11C16/12 ,  H01L21/8247 ,  H01L27/115 ,  H01L29/788 ,  H01L29/792

CPC分类号： G11C16/10 ,  G11C16/0416 ,  G11C16/0466 ,  G11C16/3427

摘要： Prior to the reprogramming of a selected flash memory cell of a memory cell array, electrons being removed from the memory layer (M) in the channel region (C) by Fowler-Nordheim tunneling, a lower potential for incipient programming of the memory cell is applied to the relevant word line (WLn) while the associated bit line (BLm) remains at the basic potential. What is thereby achieved is that a gate disturb occurring during the programming operation does not lead to erratic bits along the affected word line (WLn).

摘要翻译： 在对存储单元阵列的选定闪存单元进行重新编程之前，通过Fowler-Nordheim隧道从电子区域（C）中的存储层（M）中移除的电子，用于存储器单元的初始编程的较低电位是 而相关联的位线（BL _{m ）保持在基本电位的情况下被施加到相关字线（WL SUB）。 由此实现的是在编程操作期间发生的门扰动不会导致沿着受影响的字线（WL SUB）的不稳定的位。}

公开(公告)号：US07113428B2

公开(公告)日：2006-09-26

申请号：US10954642

申请日：2004-09-30

申请人： Stefan Trost ,  Georg Tempel ,  Matthias Ernst ,  Martin Steinbrück

发明人： Stefan Trost ,  Georg Tempel ,  Matthias Ernst ,  Martin Steinbrück

IPC分类号： G11C16/04

CPC分类号： G11C16/10 ,  G11C16/0416 ,  G11C16/0466 ,  G11C16/3427

摘要： Prior to the reprogramming of a selected flash memory cell of a memory cell array, electrons being removed from the memory layer (M) in the channel region (C) by Fowler-Nordheim tunneling, a lower potential for incipient programming of the memory cell is applied to the relevant word line (WLn) while the associated bit line (BLm) remains at the basic potential. What is thereby achieved is that a gate disturb occurring during the programming operation does not lead to erratic bits along the affected word line (WLn).

摘要翻译： 在对存储单元阵列的选定闪存单元进行重新编程之前，通过Fowler-Nordheim隧道从电子区域（C）中的存储层（M）中移除的电子，用于存储器单元的初始编程的较低电位是 而相关联的位线（BL _{m ）保持在基本电位的情况下被施加到相关字线（WL SUB）。 由此实现的是在编程操作期间发生的门扰动不会导致沿着受影响的字线（WL SUB）的不稳定的位。}