Writing to memory using adaptive write techniques
    1.
    发明授权
    Writing to memory using adaptive write techniques 有权
    使用自适应写入技术写入内存

    公开(公告)号:US08230276B2

    公开(公告)日:2012-07-24

    申请号:US12568035

    申请日:2009-09-28

    IPC分类号: G11C29/00

    摘要: Techniques for writing to memory using adaptive write techniques. An adaptive write technique includes receiving at a computer a message including a plurality of symbols. The message is written to a memory. The writing to memory includes performing for each symbol in the message: writing a data value to a memory location in the memory and reading contents of the memory location after the data value has been written. The data value is determined at the computer in response to the symbol and to the contents of any memory locations previously read as part of writing the message to the memory. It is determined at the computer if the contents of the memory locations reflect the message. The writing is restarted at the computer in response to determining that the contents of the memory locations do not reflect the message.

    摘要翻译: 使用自适应写入技术写入存储器的技术。 一种自适应写入技术包括在计算机处接收包括多个符号的消息。 消息被写入存储器。 对存储器的写入包括对消息中的每个符号执行:将数据值写入存储器中的存储器位置,并且在写入数据值之后读取存储器位置的内容。 数据值在计算机响应于符号以及先前读取的任何存储器位置的内容来确定,作为将消息写入存储器的一部分。 在计算机中确定存储器位置的内容是否反映消息。 响应于确定存储器位置的内容不反映消息,在计算机上重新开始写入。

    WRITING TO MEMORY USING ADAPTIVE WRITE TECHNIQUES
    2.
    发明申请
    WRITING TO MEMORY USING ADAPTIVE WRITE TECHNIQUES 有权
    使用自适应写入技术写入记忆

    公开(公告)号:US20110078392A1

    公开(公告)日:2011-03-31

    申请号:US12568035

    申请日:2009-09-28

    IPC分类号: G06F12/00

    摘要: Techniques for writing to memory using adaptive write techniques. An adaptive write technique includes receiving at a computer a message including a plurality of symbols. The message is written to a memory. The writing to memory includes performing for each symbol in the message: writing a data value to a memory location in the memory and reading contents of the memory location after the data value has been written. The data value is determined at the computer in response to the symbol and to the contents of any memory locations previously read as part of writing the message to the memory. It is determined at the computer if the contents of the memory locations reflect the message. The writing is restarted at the computer in response to determining that the contents of the memory locations do not reflect the message.

    摘要翻译: 使用自适应写入技术写入存储器的技术。 自适应写入技术包括在计算机处接收包括多个符号的消息。 消息被写入存储器。 对存储器的写入包括对消息中的每个符号执行:将数据值写入存储器中的存储器位置,并且在写入数据值之后读取存储器位置的内容。 数据值在计算机响应于符号以及先前读取的任何存储器位置的内容来确定,作为将消息写入存储器的一部分。 在计算机中确定存储器位置的内容是否反映消息。 响应于确定存储器位置的内容不反映消息,在计算机上重新开始写入。

    WRITING TO MEMORY USING SHARED ADDRESS BUSES
    3.
    发明申请
    WRITING TO MEMORY USING SHARED ADDRESS BUSES 失效
    使用共享地址记录写入记忆

    公开(公告)号:US20110078387A1

    公开(公告)日:2011-03-31

    申请号:US12568125

    申请日:2009-09-28

    IPC分类号: G06F12/00

    摘要: Techniques for writing to memory using shared address buses. A memory device that includes a plurality of memory arrays connected to a common address bus, the common address bus used to broadcast memory addresses simultaneously to the plurality of memory arrays. Each memory array includes a plurality of memory locations and circuitry for: receiving the broadcasted memory addresses from the address bus; selecting a memory address in the memory array from a list of most recent memory addresses received from the address bus; and performing a memory access at the selected memory address, such that at a given point in time at least two of the memory arrays perform the memory access at a different broadcasted address when the memory access is a write.

    摘要翻译: 使用共享地址总线写入存储器的技术。 一种存储器件,包括连接到公共地址总线的多个存储器阵列,所述公共地址总线用于同时向所述多个存储器阵列广播存储器地址。 每个存储器阵列包括多个存储器位置和电路,用于:从地址总线接收广播的存储器地址; 从从地址总线接收的最近的存储器地址的列表中选择存储器阵列中的存储器地址; 以及在所选择的存储器地址处执行存储器访问,使得在给定时间点,当存储器访问是写入时,至少两个存储器阵列在不同的广播地址处执行存储器访问。

    Memory reading method for resistance drift mitigation
    4.
    发明授权
    Memory reading method for resistance drift mitigation 有权
    电阻漂移缓解的记忆读取方法

    公开(公告)号:US08144508B2

    公开(公告)日:2012-03-27

    申请号:US12984682

    申请日:2011-01-05

    IPC分类号: G11C11/00

    摘要: Techniques for reading phase change memory that mitigate resistance drift. One contemplated method includes apply a plurality of electrical input signals to the memory cell. The method includes measuring a plurality of electrical output signals from the memory cell resulting from the plurality of electrical input signals. The method includes calculating an invariant component of the plurality of electrical output signals dependent on the configuration of amorphous material in the memory cell. The method also includes determining a memory state of the memory cell based on the invariant component. In one embodiment of the invention, the method further includes mapping the plurality of electrical output signals to a measurements region of a plurality of measurements regions. The measurements regions correspond to memory states of the memory cell.

    摘要翻译: 读取相变存储器的技术,减轻电阻漂移。 一种预期的方法包括将多个电输入信号应用于存储器单元。 该方法包括从多个电输入信号测量来自存储器单元的多个电输出信号。 该方法包括根据存储单元中非晶材料的配置来计算多个电输出信号的不变分量。 该方法还包括基于不变分量来确定存储器单元的存储器状态。 在本发明的一个实施例中,该方法还包括将多个电输出信号映射到多个测量区域的测量区域。 测量区域对应于存储器单元的存储器状态。

    VARIABILITY AWARE WEAR LEVELING
    5.
    发明申请
    VARIABILITY AWARE WEAR LEVELING 有权
    可变性知识磨损水平

    公开(公告)号:US20130339570A1

    公开(公告)日:2013-12-19

    申请号:US13525757

    申请日:2012-06-18

    IPC分类号: G06F12/02

    摘要: Techniques are presented that include determining, for data to be written to a nonvolatile memory, a location in the nonvolatile memory to which the data should be written based at least on one or more wear metrics corresponding to the location. The one or more wear metrics are based on measurements of the location. The measurements estimate physical wear of the location. The techniques further include writing the data to the determined location in the nonvolatile memory. The techniques may be performed by methods, apparatus (e.g., a memory controller), and computer program products.

    摘要翻译: 提出了技术,包括至少基于对应于该位置的一个或多个磨损度量,确定要写入非易失性存储器的数据的非易失性存储器中应该写入数据的位置。 一个或多个磨损指标基于位置的测量。 测量值估计位置的物理磨损。 这些技术还包括将数据写入非易失性存储器中确定的位置。 这些技术可以通过方法,装置(例如,存储器控制器)和计算机程序产品来执行。

    Memory reading method for resistance drift mitigation
    6.
    发明授权
    Memory reading method for resistance drift mitigation 有权
    电阻漂移缓解的记忆读取方法

    公开(公告)号:US07929338B2

    公开(公告)日:2011-04-19

    申请号:US12392032

    申请日:2009-02-24

    IPC分类号: G11C11/00

    摘要: Techniques for reading phase change memory that mitigate resistance drift. One contemplated method includes apply a plurality of electrical input signals to the memory cell. The method includes measuring a plurality of electrical output signals from the memory cell resulting from the plurality of electrical input signals. The method includes calculating an invariant component of the plurality of electrical output signals dependent on the configuration of amorphous material in the memory cell. The method also includes determining a memory state of the memory cell based on the invariant component. In one embodiment of the invention, the method further includes mapping the plurality of electrical output signals to a measurements region of a plurality of measurements regions. The measurements regions correspond to memory states of the memory cell.

    摘要翻译: 读取相变存储器的技术,减轻电阻漂移。 一种预期的方法包括将多个电输入信号应用于存储器单元。 该方法包括从多个电输入信号测量来自存储器单元的多个电输出信号。 该方法包括根据存储单元中非晶材料的配置来计算多个电输出信号的不变分量。 该方法还包括基于不变分量来确定存储器单元的存储器状态。 在本发明的一个实施例中,该方法还包括将多个电输出信号映射到多个测量区域的测量区域。 测量区域对应于存储器单元的存储器状态。

    MEMORY READING METHOD FOR RESISTANCE DRIFT MITIGATION
    9.
    发明申请
    MEMORY READING METHOD FOR RESISTANCE DRIFT MITIGATION 有权
    用于电阻缓解的记忆读取方法

    公开(公告)号:US20110096594A1

    公开(公告)日:2011-04-28

    申请号:US12984682

    申请日:2011-01-05

    IPC分类号: G11C11/00 G11C7/00

    摘要: Techniques for reading phase change memory that mitigate resistance drift. One contemplated method includes apply a plurality of electrical input signals to the memory cell. The method includes measuring a plurality of electrical output signals from the memory cell resulting from the plurality of electrical input signals. The method includes calculating an invariant component of the plurality of electrical output signals dependent on the configuration of amorphous material in the memory cell. The method also includes determining a memory state of the memory cell based on the invariant component. In one embodiment of the invention, the method further includes mapping the plurality of electrical output signals to a measurements region of a plurality of measurements regions. The measurements regions correspond to memory states of the memory cell.

    摘要翻译: 读取相变存储器的技术,减轻电阻漂移。 一种预期的方法包括将多个电输入信号应用于存储器单元。 该方法包括从多个电输入信号测量来自存储器单元的多个电输出信号。 该方法包括根据存储单元中非晶材料的配置来计算多个电输出信号的不变分量。 该方法还包括基于不变分量来确定存储器单元的存储器状态。 在本发明的一个实施例中,该方法还包括将多个电输出信号映射到多个测量区域的测量区域。 测量区域对应于存储器单元的存储器状态。

    MEMORY READING METHOD FOR RESISTANCE DRIFT MITIGATION
    10.
    发明申请
    MEMORY READING METHOD FOR RESISTANCE DRIFT MITIGATION 有权
    用于电阻缓解的记忆读取方法

    公开(公告)号:US20100214830A1

    公开(公告)日:2010-08-26

    申请号:US12392032

    申请日:2009-02-24

    IPC分类号: G11C11/00 G11C7/00

    摘要: Techniques for reading phase change memory that mitigate resistance drift. One contemplated method includes apply a plurality of electrical input signals to the memory cell. The method includes measuring a plurality of electrical output signals from the memory cell resulting from the plurality of electrical input signals. The method includes calculating an invariant component of the plurality of electrical output signals dependent on the configuration of amorphous material in the memory cell. The method also includes determining a memory state of the memory cell based on the invariant component. In one embodiment of the invention, the method further includes mapping the plurality of electrical output signals to a measurements region of a plurality of measurements regions. The measurements regions correspond to memory states of the memory cell.

    摘要翻译: 读取相变存储器的技术,减轻电阻漂移。 一种预期的方法包括将多个电输入信号应用于存储器单元。 该方法包括从多个电输入信号测量来自存储器单元的多个电输出信号。 该方法包括根据存储单元中非晶材料的配置来计算多个电输出信号的不变分量。 该方法还包括基于不变分量来确定存储器单元的存储器状态。 在本发明的一个实施例中,该方法还包括将多个电输出信号映射到多个测量区域的测量区域。 测量区域对应于存储器单元的存储器状态。