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    REFRESH OF NEIGHBORING MEMORY CELLS BASED ON READ STATUS
    2.
    发明公开
    REFRESH OF NEIGHBORING MEMORY CELLS BASED ON READ STATUS 审中-公开

    公开(公告)号：US20240321350A1

    公开(公告)日：2024-09-26

    申请号：US18734724

    申请日：2024-06-05

    Applicant: Micron Technology, Inc.

    Inventor： Li-Te Chang ,  Murong Lang ,  Zhenming Zhou

    IPC: G11C13/00 ,  G11C11/56

    CPC classification number: G11C13/0033 ,  G11C13/0004 ,  G11C13/004 ,  G11C13/0069 ,  G11C11/5678

    Abstract: Systems, methods, and apparatus related to memory devices. In one approach, a cross-point memory array includes memory cells. A media controller reads one or more first memory cells and determines a read status. The read status indicates an error when reading the first memory cells. In response to this error, the controller refreshes the first memory cells. The controller uses the read status to determine zero-to-one failures associated with the first memory cells. If a number of these failures exceeds a threshold, then a refresh is applied to neighboring memory cells of the first memory cells. The physical addresses for the neighboring memory cells are determined by the controller from the physical addresses for the first memory cells.

    Memory systems and memory programming methods
    4.
    发明授权
    Memory systems and memory programming methods 有权

    公开(公告)号：US11817147B2

    公开(公告)日：2023-11-14

    申请号：US16998834

    申请日：2020-08-20

    Applicant: Micron Technology, Inc.

    Inventor： Makoto Kitagawa ,  Adam Johnson

    IPC: G11C13/00 ,  G11C11/16

    CPC classification number: G11C13/0069 ,  G11C13/0026 ,  G11C13/0033 ,  G11C11/1655 ,  G11C11/1675 ,  G11C13/0004 ,  G11C13/0007 ,  G11C13/0011 ,  G11C2213/79

    Abstract: Memory systems and memory programming methods are described. According to one arrangement, a memory system includes a plurality of memory cells individually configured to have a plurality of different memory states, a plurality of bitlines coupled with the memory cells, access circuitry coupled with the bitlines and configured to apply a plurality of program signals to the bitlines to program the memory cells between the different memory states, a controller configured to control the access circuitry to provide a first program signal and a second program signal to one of the bitlines coupled with one of the memory cells to program the one memory cell from a first of the memory states to a second of the memory states, wherein the second program signal has an increased electrical characteristic compared with the first program signal, and selection circuitry configure to couple another of the bitlines which is immediately adjacent to the one bitline to a node having a first voltage which is different than a second voltage of the one bitline during the provision of the first and second program signals to the one bitline.

    REDUCING DISTURBANCE IN CROSSBAR ARRAY CIRCUITS
    6.
    发明公开
    REDUCING DISTURBANCE IN CROSSBAR ARRAY CIRCUITS 审中-公开

    公开(公告)号：US20230335190A1

    公开(公告)日：2023-10-19

    申请号：US18336814

    申请日：2023-06-16

    Applicant: TetraMem Inc.

    Inventor： Ning Ge

    IPC: G11C13/00

    CPC classification number: G11C13/0033 ,  G11C13/0097 ,  G11C13/0069 ,  G11C2013/009 ,  G11C2213/79 ,  G11C2213/74

    Abstract: A crossbar circuit is provided. The crossbar circuit includes one or more bit lines, one or more word lines, one or more cell devices connected between the bit lines and the word lines, one or more analog-to-digital converters (ADCs) connected to the one or more bit lines, one or more digital-to-analog converters (DACs) connected to the one or more word lines, one or more access controls connected to the one or more cell devices and configured to select a cell device in the one or more cell devices and to program the selected cell device, and a slew rate controller connected to the one or more bit lines. The first slew rate controller is configured to receive an input signal or a bias and output a slew-rate controlled signal.

    Refresh of Neighboring Memory Cells Based on Read Status
    8.
    发明公开
    Refresh of Neighboring Memory Cells Based on Read Status 审中-公开

    公开(公告)号：US20230207003A1

    公开(公告)日：2023-06-29

    申请号：US17561340

    申请日：2021-12-23

    Applicant: Micron Technology, Inc.

    Inventor： Li-Te Chang ,  Murong Lang ,  Zhenming Zhou

    IPC: G11C13/00

    CPC classification number: G11C13/0033 ,  G11C13/0004 ,  G11C13/004 ,  G11C13/0069 ,  G11C11/5678

    Abstract: Systems, methods, and apparatus related to memory devices. In one approach, a cross-point memory array includes memory cells. A media controller reads one or more first memory cells and determines a read status. The read status indicates an error when reading the first memory cells. In response to this error, the controller refreshes the first memory cells. The controller uses the read status to determine zeroto-one failures associated with the first memory cells. If a number of these failures exceeds a threshold, then a refresh is applied to neighboring memory cells of the first memory cells. The physical addresses for the neighboring memory cells are determined by the controller from the physical addresses for the first memory cells.

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