利索-全球专利检索

  1. 登录
  2. 注册

搜索结果

9 条记录 (耗时 0.018 秒)

    Method to obtain fully silicided gate electrodes
    1.
    发明授权
    Method to obtain fully silicided gate electrodes 有权

    公开(公告)号：US07244642B2

    公开(公告)日：2007-07-17

    申请号：US11228902

    申请日：2005-09-16

    申请人： Steven A. Vitale ,  Hyesook Hong ,  Freidoon Mehrad

    发明人： Steven A. Vitale ,  Hyesook Hong ,  Freidoon Mehrad

    IPC分类号： H01L21/337 ,  H01L21/336 ,  H01L21/8234 ,  H01L21/8238 ,  H01L21/469 ,  H01L21/31

    CPC分类号： H01L21/823425 ,  H01L21/823443 ,  H01L21/823835

    摘要： The present invention provides a method of fabricating a microelectronics device. In one aspect, the method comprises depositing a protective layer (510) over a spacer material (415) located over gate electrodes (250) and a doped region (255) located between the gate electrodes (250), removing a portion of the spacer material (415) and the protective layer (510) located over the gate electrodes (250). A remaining portion of the spacer material (415) remains over the top surface of the gate electrodes (250) and over the doped region (255), and a portion of the protective layer (510) remains over the doped region (255). The method further comprises removing the remaining portion of the spacer material (415) to form spacer sidewalls on the gate electrodes (250), expose the top surface of the gate electrodes (250), and leave a remnant of the spacer material (415) over the doped region (255). Source/drains are formed adjacent the gate electrodes 250 and through the remnant of the spacer material (415), and a metal is incorporated into the gate electrodes (250).

    METHOD OF SIMULTANEOUSLY SILICIDING A POLYSILICON GATE AND SOURCE/DRAIN OF A SEMICONDUCTOR DEVICE, AND RELATED DEVICE
    2.
    发明申请
    METHOD OF SIMULTANEOUSLY SILICIDING A POLYSILICON GATE AND SOURCE/DRAIN OF A SEMICONDUCTOR DEVICE, AND RELATED DEVICE 有权
    同时硅化多晶硅栅极和半导体器件的源极/漏极的方法及相关器件

    公开(公告)号：US20080265344A1

    公开(公告)日：2008-10-30

    申请号：US11741519

    申请日：2007-04-27

    申请人： Freidoon Mehrad ,  Shaofeng Yu ,  Steven A. Vitale ,  Joe G. Tran

    发明人： Freidoon Mehrad ,  Shaofeng Yu ,  Steven A. Vitale ,  Joe G. Tran

    IPC分类号： H01L29/78 ,  H01L21/336

    CPC分类号： H01L29/665 ,  H01L21/28097 ,  H01L21/823814 ,  H01L21/823835 ,  H01L29/4975 ,  H01L29/6653 ,  H01L29/66545 ,  H01L29/6659 ,  H01L29/7833

    摘要： A method of simultaneously siliciding a polysilicon gate and source/drain of a semiconductor device, and related device. At least some of the illustrative embodiments are methods comprising forming a gate stack over a semiconductor substrate (the gate stack comprising a first polysilicon layer, a first nitride layer, and a second polysilicon layer), forming a second nitride layer over an active region in the semiconductor substrate adjacent to the gate stack, performing a chemical mechanical polishing that stops on the first nitride layer and on the second nitride layer, removing the first nitride layer and the second nitride layer, and performing a simultaneous silicidation of the first polysilicon layer and the active region.

    摘要翻译： 同时硅化半导体器件的多晶硅栅极和源极/漏极的方法以及相关器件。 示例性实施例中的至少一些是包括在半导体衬底上形成栅极堆叠的方法（栅堆叠包括第一多晶硅层，第一氮化物层和第二多晶硅层），在有源区上形成第二氮化物层 所述半导体衬底与所述栅极堆叠相邻，执行停止在所述第一氮化物层和所述第二氮化物层上的化学机械抛光，去除所述第一氮化物层和所述第二氮化物层，以及执行所述第一多晶硅层的同时硅化;以及 活跃区域。

    METHOD OF SIMULTANEOUSLY SILICIDING A POLYSILICON GATE AND SOURCE/DRAIN OF A SEMICONDUCTOR DEVICE, AND RELATED DEVICE
    3.
    发明申请
    METHOD OF SIMULTANEOUSLY SILICIDING A POLYSILICON GATE AND SOURCE/DRAIN OF A SEMICONDUCTOR DEVICE, AND RELATED DEVICE 审中-公开
    同时硅化多晶硅栅极和半导体器件的源极/漏极的方法及相关器件

    公开(公告)号：US20100176462A1

    公开(公告)日：2010-07-15

    申请号：US12731932

    申请日：2010-03-25

    申请人： Freidoon Mehrad ,  Shaofeng Yu ,  Steven A. Vitale ,  Joe G. Tran

    发明人： Freidoon Mehrad ,  Shaofeng Yu ,  Steven A. Vitale ,  Joe G. Tran

    IPC分类号： H01L29/78

    CPC分类号： H01L29/665 ,  H01L21/28097 ,  H01L21/823814 ,  H01L21/823835 ,  H01L29/4975 ,  H01L29/6653 ,  H01L29/66545 ,  H01L29/6659 ,  H01L29/7833

    摘要： A method of simultaneously siliciding a polysilicon gate and source/drain of a semiconductor device, and related device. At least some of the illustrative embodiments are methods comprising forming a gate stack over a semiconductor substrate (the gate stack comprising a first polysilicon layer, a first nitride layer, and a second polysilicon layer), forming a second nitride layer over an active region in the semiconductor substrate adjacent to the gate stack, performing a chemical mechanical polishing that stops on the first nitride layer and on the second nitride layer, removing the first nitride layer and the second nitride layer, and performing a simultaneous silicidation of the first polysilicon layer and the active region.

    摘要翻译： 同时硅化半导体器件的多晶硅栅极和源极/漏极的方法以及相关器件。 示例性实施例中的至少一些是包括在半导体衬底上形成栅极堆叠的方法（栅堆叠包括第一多晶硅层，第一氮化物层和第二多晶硅层），在有源区上形成第二氮化物层 所述半导体衬底与所述栅极堆叠相邻，执行停止在所述第一氮化物层和所述第二氮化物层上的化学机械抛光，去除所述第一氮化物层和所述第二氮化物层，以及执行所述第一多晶硅层的同时硅化;以及 活跃区域。

    Method of simultaneously siliciding a polysilicon gate and source/drain of a semiconductor device, and related device
    4.
    发明授权
    Method of simultaneously siliciding a polysilicon gate and source/drain of a semiconductor device, and related device 有权
    同时硅化半导体器件的多晶硅栅极和源极/漏极的方法及相关器件

    公开(公告)号：US07727842B2

    公开(公告)日：2010-06-01

    申请号：US11741519

    申请日：2007-04-27

    申请人： Freidoon Mehrad ,  Shaofeng Yu ,  Steven A. Vitale ,  Joe G. Tran

    发明人： Freidoon Mehrad ,  Shaofeng Yu ,  Steven A. Vitale ,  Joe G. Tran

    IPC分类号： H01L21/8234

    CPC分类号： H01L29/665 ,  H01L21/28097 ,  H01L21/823814 ,  H01L21/823835 ,  H01L29/4975 ,  H01L29/6653 ,  H01L29/66545 ,  H01L29/6659 ,  H01L29/7833

    摘要： A method of simultaneously siliciding a polysilicon gate and source/drain of a semiconductor device, and related device. At least some of the illustrative embodiments are methods comprising forming a gate stack over a semiconductor substrate (the gate stack comprising a first polysilicon layer, a first nitride layer, and a second polysilicon layer), forming a second nitride layer over an active region in the semiconductor substrate adjacent to the gate stack, performing a chemical mechanical polishing that stops on the first nitride layer and on the second nitride layer, removing the first nitride layer and the second nitride layer, and performing a simultaneous silicidation of the first polysilicon layer and the active region.

    摘要翻译： 同时硅化半导体器件的多晶硅栅极和源极/漏极的方法以及相关器件。 示例性实施例中的至少一些是包括在半导体衬底上形成栅极堆叠的方法（栅堆叠包括第一多晶硅层，第一氮化物层和第二多晶硅层），在有源区上形成第二氮化物层 所述半导体衬底与所述栅极堆叠相邻，执行停止在所述第一氮化物层和所述第二氮化物层上的化学机械抛光，去除所述第一氮化物层和所述第二氮化物层，以及执行所述第一多晶硅层的同时硅化;以及 活跃区域。

    SOLID-STATE NEUTRON DETECTOR WITH GADOLINIUM CONVERTER
    9.
    发明申请
    SOLID-STATE NEUTRON DETECTOR WITH GADOLINIUM CONVERTER 审中-公开
    固态中性离子检测器，带有二极管转换器

    公开(公告)号：US20130056641A1

    公开(公告)日：2013-03-07

    申请号：US13488558

    申请日：2012-06-05

    申请人： Steven A. Vitale ,  Pascale Gouker

    发明人： Steven A. Vitale ,  Pascale Gouker

    IPC分类号： G01T3/08

    CPC分类号： G01T3/08

    摘要： Thermal Neutron Detector. The detector includes at least one semiconductor transistor within a circuit for monitoring current flowing through the semiconductor transistor. A film of gadolinium-containing material covers the semiconductor transistor whereby thermal neutrons interacting with the gadolinium-containing material generate electrons that induce a change in current flowing through the semiconductor transistor to provide neutron detection.

    摘要翻译： 热中子探测器。 检测器包括用于监测流过半导体晶体管的电流的电路内的至少一个半导体晶体管。 含有钆的材料的膜覆盖半导体晶体管，由此与含钆材料相互作用的热中子产生电子，其引起流过半导体晶体管的电流变化以提供中子检测。