公开(公告)号：US20090039334A1

公开(公告)日：2009-02-12

申请号：US12146184

申请日：2008-06-25

Applicant: Su Jin CHAE ,  Keum Bum LEE ,  Min Yong LEE

Inventor： Su Jin CHAE ,  Keum Bum LEE ,  Min Yong LEE

IPC: H01L45/00 ,  H01L21/311

CPC classification number: H01L45/06 ,  H01L27/2409

Abstract: A phase-change memory device and a fabrication method thereof, capable of reducing driving current while minimizing a size of a contact hole used for forming a PN diode in the phase-change memory device that employs the PN diode. The method of fabricating the phase-change memory device includes the steps of preparing a semiconductor substrate having a junction area formed with a dielectric layer, forming an interlayer dielectric layer having etching selectivity lower than that of the dielectric layer over an entire structure, and forming a contact hole by removing predetermined portions of the interlayer dielectric layer and the dielectric layer. The contact area between the PN diode and the semiconductor substrate is increased so that interfacial resistance is reduced.

Abstract translation: 一种相变存储器件及其制造方法，其能够在使用PN二极管的相变存储器件中最小化用于形成PN二极管的接触孔的尺寸的同时降低驱动电流。 制造相变存储器件的方法包括以下步骤：制备具有与电介质层形成的结区的半导体衬底，在整个结构上形成具有低于电介质层的蚀刻选择性的层间电介质层，以及形成 通过去除层间电介质层和电介质层的预定部分的接触孔。 PN二极管和半导体衬底之间的接触面积增加，从而降低界面电阻。

公开(公告)号：US20080160730A1

公开(公告)日：2008-07-03

申请号：US11757323

申请日：2007-06-01

Applicant: Min Yong LEE ,  Yong Soo JUNG

Inventor： Min Yong LEE ,  Yong Soo JUNG

IPC: H01L21/265

CPC classification number: H01L21/26586 ,  H01L29/1045 ,  H01L29/1083

Abstract: A method of fabricating a semiconductor device includes forming a mask pattern for exposing a region of a semiconductor substrate. Dopant ions are implanted into the exposed region of the semiconductor substrate at a tilt angle of approximately 4.4° to 7°.

Abstract translation: 制造半导体器件的方法包括形成用于暴露半导体衬底区域的掩模图案。 掺杂离子以约4.4°至7°的倾斜角度注入到半导体衬底的暴露区域中。

公开(公告)号：US20110275204A1

公开(公告)日：2011-11-10

申请号：US13186309

申请日：2011-07-19

Applicant: Min Yong LEE ,  Yong Soo Jung

Inventor： Min Yong LEE ,  Yong Soo Jung

IPC: H01L21/425

CPC classification number: H01L21/26586 ,  H01L29/1045 ,  H01L29/1083

Abstract: A method of fabricating a semiconductor device includes forming a mask pattern for defining a region of a semiconductor substrate. An impurity layer for suppressing punch-through will be formed in the defined region. Dopant ions are implanted into the defined region of the semiconductor substrate at a tilt angle of approximately 4.4° to 7°.

Abstract translation: 制造半导体器件的方法包括形成用于限定半导体衬底的区域的掩模图案。 将在限定的区域中形成用于抑制穿通的杂质层。 掺杂离子以约4.4°至7°的倾斜角度注入到半导体衬底的限定区域中。

公开(公告)号：US20110097822A1

公开(公告)日：2011-04-28

申请号：US12649048

申请日：2009-12-29

Applicant: Min Yong LEE

Inventor： Min Yong LEE

IPC: H01L21/66

CPC classification number: H01L21/31053 ,  H01L27/1021 ,  H01L29/861

Abstract: A method of manufacturing a semiconductor device to have uniform topology includes forming an interlayer insulating layer on a semiconductor device, carrying out an ion implantation process by varying an amount of ion-implantation according to a height profile of the interlayer insulating layer, and planarizing the interlayer insulating layer.

Abstract translation: 制造具有均匀拓扑结构的半导体器件的方法包括在半导体器件上形成层间绝缘层，通过根据层间绝缘层的高度分布改变离子注入量进行离子注入工艺，并平面化 层间绝缘层。

公开(公告)号：US20120015510A1

公开(公告)日：2012-01-19

申请号：US13186324

申请日：2011-07-19

Applicant: Min Yong LEE ,  Yong Soo Jung

Inventor： Min Yong LEE ,  Yong Soo Jung

IPC: H01L21/425

CPC classification number: H01L21/26586 ,  H01L29/1045 ,  H01L29/1083

Abstract: A method of fabricating a semiconductor device includes forming a mask pattern for defining a region of a semiconductor substrate. A field stop dopant layer will be formed in the defined region. Dopant ions are implanted into the defined region of the semiconductor substrate at a tilt angle of approximately 4.4° to 7°.

Abstract translation: 制造半导体器件的方法包括形成用于限定半导体衬底的区域的掩模图案。 在限定的区域中将形成场阻挡掺杂剂层。 掺杂离子以约4.4°至7°的倾斜角度注入到半导体衬底的限定区域中。

公开(公告)号：US20100294655A1

公开(公告)日：2010-11-25

申请号：US12633801

申请日：2009-12-09

Applicant: Bong Hwan HONG ,  Won Taek HWANG ,  Min Yong LEE ,  Tae Keun YANG ,  You Seok KIM

Inventor： Bong Hwan HONG ,  Won Taek HWANG ,  Min Yong LEE ,  Tae Keun YANG ,  You Seok KIM

IPC: C25B11/03

CPC classification number: G21G1/10 ,  G21G2001/0015 ,  H05H6/00

Abstract: A target apparatus for producing a radioisotope having improved cooling performance including a cavity member including a cavity accommodating H218O concentrate and producing 18F through a nuclear reaction between the H218O concentrate and protons irradiated onto the H218O concentrate, wherein the cavity member includes a front aperture and a rear aperture disposed in opposite directions on a path in which the protons are irradiated and connected to the cavity so that the cavity has openings. wherein a thermo-chemically stable layer plated with titanium or niobium is formed in an inner circumference of the cavity.

Abstract translation: 一种用于生产具有改进的冷却性能的放射性同位素的目标装置，其包括空腔构件，所述空腔构件包括容纳H 2 18 O浓缩物的空腔，并且通过在H 2 18 O浓缩物和照射到H 2 18 O浓缩物上的质子之间的核反应产生18F，其中所述空腔构件包括前孔和 后孔在辐射质子的路径上以相反的方向设置，并且连接到空腔，使得空腔具有开口。 其中在所述空腔的内周形成镀有钛或铌的热化学稳定层。

公开(公告)号：US20110275205A1

公开(公告)日：2011-11-10

申请号：US13186345

申请日：2011-07-19

Applicant: Min Yong LEE ,  Yong Soo JUNG

Inventor： Min Yong LEE ,  Yong Soo JUNG

IPC: H01L21/265

CPC classification number: H01L21/26586 ,  H01L29/1045 ,  H01L29/1083

Abstract: A method of fabricating a semiconductor device includes forming a mask pattern for defining a region on a semiconductor substrate. A well will be formed in the defined region. Dopant ions are implanted into the defined region of the semiconductor substrate at a tilt angle of approximately 4.4° to 7°.

Abstract translation: 制造半导体器件的方法包括形成用于限定半导体衬底上的区域的掩模图案。 在定义的区域将形成一个井。 掺杂离子以约4.4°至7°的倾斜角度注入到半导体衬底的限定区域中。