公开(公告)号：US20080276149A1

公开(公告)日：2008-11-06

申请号：US11905733

申请日：2007-10-03

申请人： Jun Jin Kong ,  Seung-Hwan Song ,  Young Hwan Lee ,  Dong Hyuk Chae ,  Kyoung Lae Cho ,  Nam Phil Jo ,  Sung Chung Park ,  Dong Ku Kang

发明人： Jun Jin Kong ,  Seung-Hwan Song ,  Young Hwan Lee ,  Dong Hyuk Chae ,  Kyoung Lae Cho ,  Nam Phil Jo ,  Sung Chung Park ,  Dong Ku Kang

IPC分类号： G06F11/07

CPC分类号： G06F11/1008

摘要： An Error Control Code (ECC) apparatus may include a control signal generator that generates an ECC control signal based on channel information. The ECC apparatus also may include: a plurality of ECC encoding controllers that output data respectively inputted via storage elements corresponding to the ECC control signal; and/or an encoding unit that encodes, using a plurality of data outputted from the plurality of ECC encoding controllers, encoding input data into a number of subdata corresponding to the ECC control signal. In addition or in the alternative, the ECC apparatus may include: a plurality of ECC decoding controllers that output data respectively inputted via the storage elements corresponding to the ECC control signal; and/or a decoding unit that decodes, using a plurality of data outputted from the plurality of ECC decoding controllers, a number of decoding input data corresponding to the ECC control signal into one piece of output data.

摘要翻译： 错误控制码（ECC）装置可以包括基于频道信息产生ECC控制信号的控制信号发生器。 ECC装置还可以包括：多个ECC编码控制器，其输出经由与ECC控制信号对应的存储元件分别输入的数据; 和/或编码单元，其使用从所述多个ECC编码控制器输出的多个数据，将输入数据编码为对应于所述ECC控制信号的多个子数据进行编码。 另外或者可选地，ECC装置可以包括：多个ECC解码控制器，其输出经由与ECC控制信号对应的存储元件分别输入的数据; 和/或解码单元，其使用从所述多个ECC解码控制器输出的多个数据将对应于所述ECC控制信号的多个解码输入数据解码为一条输出数据。

公开(公告)号：US20080285340A1

公开(公告)日：2008-11-20

申请号：US12007921

申请日：2008-01-17

申请人： Seung-Hwan Song ,  Jun Jin Kong ,  Sung Chung Park ,  Dong Hyuk Chae ,  Seung Jae Lee ,  Dong Ku Kang

发明人： Seung-Hwan Song ,  Jun Jin Kong ,  Sung Chung Park ,  Dong Hyuk Chae ,  Seung Jae Lee ,  Dong Ku Kang

IPC分类号： G11C16/06 ,  G11C7/02

CPC分类号： G11C16/26 ,  G11C7/1006 ,  G11C11/5642

摘要： Disclosed are an apparatus and a method for reading data. The method for reading data according to example embodiments includes comparing a threshold voltage of a memory cell with a first boundary voltage, comparing the threshold voltage with a second boundary voltage having a higher voltage level than that of the first boundary voltage, and determining data of the memory cell based on the threshold voltage, the first boundary voltage, and the second boundary voltage.

摘要翻译： 公开了一种用于读取数据的装置和方法。 根据示例实施例的用于读取数据的方法包括将存储器单元的阈值电压与第一边界电压进行比较，将阈值电压与具有比第一边界电压的电压电平更高的电压电平的第二边界电压进行比较，以及确定数据 所述存储单元基于所述阈值电压，所述第一边界电压和所述第二边界电压。

公开(公告)号：US07835209B2

公开(公告)日：2010-11-16

申请号：US12003545

申请日：2007-12-28

申请人： Sung Chung Park ,  Jun Jin Kong ,  Seung-Hwan Song ,  Dong Ku Kang

发明人： Sung Chung Park ,  Jun Jin Kong ,  Seung-Hwan Song ,  Dong Ku Kang

IPC分类号： G11C7/02

CPC分类号： G11C16/28 ,  G11C29/02 ,  G11C29/026 ,  G11C29/028 ,  G11C2029/0411

摘要： A method and apparatus for controlling a reading level of a memory cell are provided. The method of controlling a reading level of a memory cell may include: receiving metric values calculated based on given voltage levels and reference levels; generating summed values for each of the reference levels by summing metric values corresponding to levels of a received signal from among the received metric values; selecting the reference level having the greatest value of the generated summed values from the reference levels; and controlling the reading level of the memory cell based on the selected reference level.

摘要翻译： 提供了一种用于控制存储单元的读取电平的方法和装置。 控制存储器单元的读取电平的方法可以包括：接收基于给定电压电平和参考电平计算出的度量值; 通过对应于来自接收到的度量值中的接收信号的电平的度量值相加来产生每个参考电平的相加值; 从所述参考电平中选择具有所生成的总和值的最大值的参考电平; 以及基于所选择的参考电平来控制所述存储器单元的读取电平。

公开(公告)号：US08112693B2

公开(公告)日：2012-02-07

申请号：US11905734

申请日：2007-10-03

申请人： Jun Jin Kong ,  Seung-Hwan Song ,  Dong Hyuk Chae ,  Kyoung Lae Cho ,  Seung Jae Lee ,  Nam Phil Jo ,  Sung Chung Park ,  Dong Ku Kang

发明人： Jun Jin Kong ,  Seung-Hwan Song ,  Dong Hyuk Chae ,  Kyoung Lae Cho ,  Seung Jae Lee ,  Nam Phil Jo ,  Sung Chung Park ,  Dong Ku Kang

IPC分类号： G11C29/00

CPC分类号： G06F11/1072

摘要： An Error Control Code (ECC) apparatus applied to a memory of a Multi-Level Cell (MLC) method may include: a bypass control signal generator generating a bypass control signal; and an ECC performing unit that may include at least two ECC decoding blocks, determining whether to bypass a portion of the at least two ECC decoding blocks based on the bypass control signal, and/or performing an ECC decoding. In addition or in the alternative, the ECC performing unit may include at least two ECC encoding blocks, determining whether to bypass a portion of the at least two ECC encoding blocks based on the bypass control signal, and/or performing an ECC encoding. An ECC method applied to a memory of a MLC method and a computer-readable recording medium storing a program for implementing an EEC method applied to a memory of a MLC method are also disclose.

摘要翻译： 应用于多电平单元（MLC）方法的存储器的错误控制码（ECC）装置可以包括：旁路控制信号发生器，其生成旁路控制信号; 以及ECC执行单元，其可以包括至少两个ECC解码块，基于旁路控制信号确定是否绕过所述至少两个ECC解码块的一部分，和/或执行ECC解码。 另外或在替代方案中，ECC执行单元可以包括至少两个ECC编码块，基于旁路控制信号确定是否绕过至少两个ECC编码块的一部分，和/或执行ECC编码。 还公开了应用于MLC方法的存储器的ECC方法和存储用于实现应用于MLC方法的存储器的EEC方法的程序的计算机可读记录介质。

公开(公告)号：US08028215B2

公开(公告)日：2011-09-27

申请号：US11905733

申请日：2007-10-03

申请人： Jun Jin Kong ,  Seung-Hwan Song ,  Young Hwan Lee ,  Dong Hyuk Chae ,  Kyong Lae Cho ,  Nam Phil Jo ,  Sung Chung Park ,  Dong Ku Kang

发明人： Jun Jin Kong ,  Seung-Hwan Song ,  Young Hwan Lee ,  Dong Hyuk Chae ,  Kyong Lae Cho ,  Nam Phil Jo ,  Sung Chung Park ,  Dong Ku Kang

IPC分类号： H03M13/00 ,  G06F11/00

CPC分类号： G06F11/1008

摘要： An Error Control Code (ECC) apparatus may include a control signal generator that generates an ECC control signal based on channel information. The ECC apparatus also may include: a plurality of ECC encoding controllers that output data respectively inputted via storage elements corresponding to the ECC control signal; and/or an encoding unit that encodes, using a plurality of data outputted from the plurality of ECC encoding controllers, encoding input data into a number of subdata corresponding to the ECC control signal. In addition or in the alternative, the ECC apparatus may include: a plurality of ECC decoding controllers that output data respectively inputted via the storage elements corresponding to the ECC control signal; and/or a decoding unit that decodes, using a plurality of data outputted from the plurality of ECC decoding controllers, a number of decoding input data corresponding to the ECC control signal into one piece of output data.

摘要翻译： 错误控制码（ECC）装置可以包括基于频道信息产生ECC控制信号的控制信号发生器。 ECC装置还可以包括：多个ECC编码控制器，其输出经由与ECC控制信号对应的存储元件分别输入的数据; 和/或编码单元，其使用从所述多个ECC编码控制器输出的多个数据，将输入数据编码为对应于所述ECC控制信号的多个子数据进行编码。 另外或者可选地，ECC装置可以包括：多个ECC解码控制器，其输出经由与ECC控制信号对应的存储元件分别输入的数据; 和/或解码单元，其使用从所述多个ECC解码控制器输出的多个数据将对应于所述ECC控制信号的多个解码输入数据解码为一条输出数据。

公开(公告)号：US07800954B2

公开(公告)日：2010-09-21

申请号：US12007921

申请日：2008-01-17

申请人： Seung-Hwan Song ,  Jun Jin Kong ,  Sung Chung Park ,  Dong Hyuk Chae ,  Seung Jae Lee ,  Dong Ku Kang

发明人： Seung-Hwan Song ,  Jun Jin Kong ,  Sung Chung Park ,  Dong Hyuk Chae ,  Seung Jae Lee ,  Dong Ku Kang

IPC分类号： G11C11/34

CPC分类号： G11C16/26 ,  G11C7/1006 ,  G11C11/5642

摘要： The method for reading data according to example embodiments includes comparing a threshold voltage of a memory cell with a first boundary voltage, comparing the threshold voltage with a second boundary voltage having a higher voltage level than that of the first boundary voltage, and determining data of the memory cell based on the threshold voltage, the first boundary voltage, and the second boundary voltage.

摘要翻译： 根据示例实施例的用于读取数据的方法包括将存储器单元的阈值电压与第一边界电压进行比较，将阈值电压与具有比第一边界电压的电压电平更高的电压电平的第二边界电压进行比较，以及确定数据 所述存储单元基于所述阈值电压，所述第一边界电压和所述第二边界电压。

公开(公告)号：US20080320064A1

公开(公告)日：2008-12-25

申请号：US12003545

申请日：2007-12-28

申请人： Sung Chung Park ,  Jun Jin Kong ,  Seung-Hwan Song ,  Dong Ku Kang

发明人： Sung Chung Park ,  Jun Jin Kong ,  Seung-Hwan Song ,  Dong Ku Kang

IPC分类号： G06F1/16

CPC分类号： G11C16/28 ,  G11C29/02 ,  G11C29/026 ,  G11C29/028 ,  G11C2029/0411

摘要： A method and apparatus for controlling a reading level of a memory cell are provided. The method of controlling a reading level of a memory cell may include: receiving metric values calculated based on given voltage levels and reference levels; generating summed values for each of the reference levels by summing metric values corresponding to levels of a received signal from among the received metric values; selecting the reference level having the greatest value of the generated summed values from the reference levels; and controlling the reading level of the memory cell based on the selected reference level.

摘要翻译： 提供了一种用于控制存储单元的读取电平的方法和装置。 控制存储器单元的读取电平的方法可以包括：接收基于给定电压电平和参考电平计算出的度量值; 通过对应于来自接收到的度量值中的接收信号的电平的度量值相加来产生每个参考电平的相加值; 从所述参考电平中选择具有所生成的总和值的最大值的参考电平; 以及基于所选择的参考电平来控制所述存储器单元的读取电平。

公开(公告)号：US08020081B2

公开(公告)日：2011-09-13

申请号：US11802334

申请日：2007-05-22

申请人： Jun Jin Kong ,  Sung Chung Park ,  Yun Tae Lee ,  Young Hwan Lee ,  Si Hoon Hong ,  Jae Woong Hyun ,  Dong Ku Kang

发明人： Jun Jin Kong ,  Sung Chung Park ,  Yun Tae Lee ,  Young Hwan Lee ,  Si Hoon Hong ,  Jae Woong Hyun ,  Dong Ku Kang

IPC分类号： H03M13/03

CPC分类号： G11C11/5628 ,  G11C7/1006 ,  G11C11/5642 ,  G11C16/10

摘要： A multi-level cell (MLC) memory device may include: a MLC memory cell; an outer encoder that encodes data using a first encoding scheme to generate an outer encoded bit stream; and a trellis coded modulation (TCM) modulator that applies a program pulse to the MLC memory cell to write the data in the MLC memory cell. The program pulse may be generated by TCM modulating the outer encoded bit stream. A method of storing data in a MLC memory device, reading data from the MLC memory device, or storing data in and reading data from the MLC memory device may include: encoding data using a first encoding scheme to generate an outer encoded bit stream; and applying a program pulse to a MLC memory cell of the MLC memory device to write the data in the MLC memory cell. The program pulse may be generated by TCM modulating the outer encoded bit stream.

摘要翻译： 多级单元（MLC）存储器件可以包括：MLC存储器单元; 外部编码器，其使用第一编码方案对数据进行编码以生成外部编码比特流; 以及网格编码调制（TCM）调制器，其向MLC存储器单元施加编程脉冲以将数据写入MLC存储器单元。 可以通过对外部编码比特流进行TCM调制来生成编程脉冲。 一种在MLC存储器件中存储数据，从MLC存储器件读取数据或将数据存储在MLC存储器件中并从MLC存储器件读取数据的方法可以包括：使用第一编码方案对数据进行编码以产生外编码位流; 以及向MLC存储器件的MLC存储器单元施加编程脉冲以将数据写入MLC存储单元。 可以通过对外部编码比特流进行TCM调制来生成编程脉冲。

公开(公告)号：US20110213930A1

公开(公告)日：2011-09-01

申请号：US13067099

申请日：2011-05-09

申请人： Sung Chung Park ,  Jun Jin Kong ,  Young Hwan Lee ,  Dong Ku Kang

发明人： Sung Chung Park ,  Jun Jin Kong ,  Young Hwan Lee ,  Dong Ku Kang

IPC分类号： G06F12/08

CPC分类号： G11C11/5621 ,  G11C7/1006 ,  G11C29/00

摘要： A Multi-Level Cell (MLC) memory device and method thereof are provided. The example MLC memory device may be configured to perform data operations, and may include an MLC memory cell, a first coding device performing a first coding function, the first coding function being one of an encoding function and a decoding function, a second coding device performing a second coding function, the second coding function being one of an encoding function and a decoding function and a signal module configured to perform at least one of instructing the MLC memory cell to store data output by the second coding device if the first and second coding functions are encoding functions, and generating a demapped bit stream based on data retrieved from the MLC memory cell if the first and second coding functions are decoding functions.

摘要翻译： 提供了一种多级单元（MLC）存储器件及其方法。 示例MLC存储器件可以被配置为执行数据操作，并且可以包括MLC存储器单元，执行第一编码功能的第一编码装置，作为编码功能和解码功能之一的第一编码功能，第二编码装置 执行第二编码功能，所述第二编码功能是编码功能和解码功能之一;以及信号模块，被配置为执行指令所述MLC存储器单元存储由所述第二编码装置输出的数据中的至少一个，如果所述第一和第二编码功能 编码功能是编码功能，并且如果第一和第二编码功能是解码功能，则基于从MLC存储器单元检索的数据来生成解映射比特流。

公开(公告)号：US20080137413A1

公开(公告)日：2008-06-12

申请号：US11802334

申请日：2007-05-22

申请人： Jun Jin Kong ,  Sung Chung Park ,  Yun Tae Lee ,  Young Hwan Lee ,  Si Hoon Hong ,  Jae Woong Hyun ,  Dong Ku Kang

发明人： Jun Jin Kong ,  Sung Chung Park ,  Yun Tae Lee ,  Young Hwan Lee ,  Si Hoon Hong ,  Jae Woong Hyun ,  Dong Ku Kang

IPC分类号： G11C11/34

CPC分类号： G11C11/5628 ,  G11C7/1006 ,  G11C11/5642 ,  G11C16/10

摘要： A multi-level cell (MLC) memory device may include: a MLC memory cell; an outer encoder that encodes data using a first encoding scheme to generate an outer encoded bit stream; and a TCM modulator that applies a program pulse to the MLC memory cell to write the data in the MLC memory cell. The program pulse may be generated by TCM modulating the outer encoded bit stream. A method of storing data in a MLC memory device, reading data from the MLC memory device, or storing data in and reading data from the MLC memory device may include: encoding data using a first encoding scheme to generate an outer encoded bit stream; and applying a program pulse to a MLC memory cell of the MLC memory device to write the data in the MLC memory cell. The program pulse may be generated by TCM modulating the outer encoded bit stream.

摘要翻译： 多级单元（MLC）存储器件可以包括：MLC存储器单元; 外部编码器，其使用第一编码方案对数据进行编码以生成外部编码比特流; 以及将编程脉冲施加到MLC存储器单元以将数据写入MLC存储单元的TCM调制器。 可以通过对外部编码比特流进行TCM调制来生成编程脉冲。 一种在MLC存储器件中存储数据，从MLC存储器件读取数据或将数据存储在MLC存储器件中并从MLC存储器件读取数据的方法可以包括：使用第一编码方案对数据进行编码以产生外编码位流; 以及向MLC存储器件的MLC存储器单元施加编程脉冲以将数据写入MLC存储单元。 可以通过对外部编码比特流进行TCM调制来生成编程脉冲。