公开(公告)号：US09110344B2

公开(公告)日：2015-08-18

申请号：US13094082

申请日：2011-04-26

申请人： Hee-Seop Kim ,  Young-Chol Yang ,  Kyoung-Ju Shin ,  Sung-Kyu Hong ,  Jong-Lae Kim ,  Baek-Woon Lee

发明人： Hee-Seop Kim ,  Young-Chol Yang ,  Kyoung-Ju Shin ,  Sung-Kyu Hong ,  Jong-Lae Kim ,  Baek-Woon Lee

IPC分类号： G02F1/136 ,  G02F1/1343 ,  G02F1/1362 ,  G02F1/1337

CPC分类号： G02F1/13624 ,  G02F1/133707 ,  G02F1/134336 ,  G02F2001/134345

摘要： A pixel electrode and a direction control electrode capacitively coupled to the pixel electrode are provided in a pixel. A pixel thin film transistor is connected to a gate line, a data line, and the pixel electrode. A direction control electrode thin film transistor is connected to a previous gate line, a previous data lines or a next data line, and the direction control electrode. The gate lines are supplied with scanning signals, and each scanning signal includes first and second pulses in a frame. The first pulse of a scanning signal is synchronized with the second pulse of a previous scanning signal.

摘要翻译： 电容耦合到像素电极的像素电极和方向控制电极设置在像素中。 像素薄膜晶体管连接到栅极线，数据线和像素电极。 方向控制电极薄膜晶体管连接到先前的栅极线，先前的数据线或下一个数据线，以及方向控制电极。 栅极线被提供有扫描信号，并且每个扫描信号包括帧中的第一和第二脉冲。 扫描信号的第一脉冲与先前扫描信号的第二脉冲同步。

公开(公告)号：US20070182872A1

公开(公告)日：2007-08-09

申请号：US11737277

申请日：2007-04-19

申请人： Sung-Kyu HONG ,  Hee-Seop Kim ,  Kyoung-Ju Shin

发明人： Sung-Kyu HONG ,  Hee-Seop Kim ,  Kyoung-Ju Shin

IPC分类号： G02F1/136

CPC分类号： G02F1/1393 ,  G02F1/133707 ,  G02F2001/133761 ,  G02F2001/134381 ,  G02F2201/128

摘要： Gate lines are formed on an insulating substrate, and data lines crossing the gate lines are formed. The gate lines and the data lines are insulated from each other and intersect each other to define pixel areas. A thin film transistor including three terminals of a gate electrode, a source electrode and a drain electrode is formed in each pixel area. A direction control electrode and a pixel electrode are also formed in each pixel area. The thin film transistor switches the direction control electrode. The pixel electrode is electronically floating and capacitively coupled with the direction control electrode.

摘要翻译： 栅极线形成在绝缘基板上，形成与栅极线交叉的数据线。 栅极线和数据线彼此绝缘并且彼此相交以限定像素区域。 在每个像素区域中形成包括栅电极，源极和漏电极的三个端子的薄膜晶体管。 方向控制电极和像素电极也形成在每个像素区域中。 薄膜晶体管切换方向控制电极。 像素电极电子浮动并与方向控制电极电容耦合。

公开(公告)号：US20050151893A1

公开(公告)日：2005-07-14

申请号：US10509207

申请日：2002-07-22

申请人： Sung-Kyu Hong ,  Hee-Seop Kim ,  Kyoung-Ju Shin

发明人： Sung-Kyu Hong ,  Hee-Seop Kim ,  Kyoung-Ju Shin

IPC分类号： G02F1/1337 ,  G02F1/1333 ,  G02F1/1343 ,  G02F1/1368 ,  G02F1/139 ,  G02F1/136

CPC分类号： G02F1/1393 ,  G02F1/133707 ,  G02F2001/133761 ,  G02F2001/134381 ,  G02F2201/128

摘要： Gate lines are formed on an insulating substrate, and data lines crossing the gate lines are formed. The gate lines and the data lines are insulated from each other and intersect each other to define pixel areas. A thin film transistor including three terminals of a gate electrode, a source electrode and a drain electrode is formed in each pixel area. A direction control electrode and a pixel electrode are also formed in each pixel area. The thin film transistor switches the direction control electrode. The pixel electrode is electronically floating and capacitively coupled with the direction control electrode.

摘要翻译： 栅极线形成在绝缘基板上，形成与栅极线交叉的数据线。 栅极线和数据线彼此绝缘并且彼此相交以限定像素区域。 在每个像素区域中形成包括栅电极，源极和漏电极的三个端子的薄膜晶体管。 方向控制电极和像素电极也形成在每个像素区域中。 薄膜晶体管切换方向控制电极。 像素电极电子浮动并与方向控制电极电容耦合。

公开(公告)号：US07215386B2

公开(公告)日：2007-05-08

申请号：US10509207

申请日：2002-07-22

申请人： Sung-Kyu Hong ,  Hee-Seop Kim ,  Kyoung-Ju Shin

发明人： Sung-Kyu Hong ,  Hee-Seop Kim ,  Kyoung-Ju Shin

IPC分类号： G02F1/1368 ,  G02F1/1343

CPC分类号： G02F1/1393 ,  G02F1/133707 ,  G02F2001/133761 ,  G02F2001/134381 ,  G02F2201/128

摘要： Gate lines are formed on an insulating substrate, and data lines crossing the gate lines are formed. The gate lines and the data lines are insulated from each other and intersect each other to define pixel areas. A thin film transistor including three terminals of a gate electrode, a source electrode and a drain electrode is formed in each pixel area. A direction control electrode and a pixel electrode are also formed in each pixel area. The thin film transistor switches the direction control electrode. The pixel electrode is electronically floating and capacitively coupled with the direction control electrode.

摘要翻译： 栅极线形成在绝缘基板上，形成与栅极线交叉的数据线。 栅极线和数据线彼此绝缘并且彼此相交以限定像素区域。 在每个像素区域中形成包括栅电极，源极和漏电极的三个端子的薄膜晶体管。 方向控制电极和像素电极也形成在每个像素区域中。 薄膜晶体管切换方向控制电极。 像素电极电子浮动并与方向控制电极电容耦合。

公开(公告)号：US20090096730A1

公开(公告)日：2009-04-16

申请号：US12211627

申请日：2008-09-16

申请人： Mee-Hye JUNG ,  Kyoung-Ju Shin ,  Hee-Seop Kim ,  Young-Chol Yang ,  Chong-Chul Chai

发明人： Mee-Hye JUNG ,  Kyoung-Ju Shin ,  Hee-Seop Kim ,  Young-Chol Yang ,  Chong-Chul Chai

IPC分类号： G09G3/36 ,  G02F1/136

CPC分类号： G02F1/133707 ,  G02F1/13624 ,  G02F2201/128 ,  G09G3/3648 ,  G09G2300/0439

摘要： A display substrate includes first and second storage electrodes, a pixel electrode and a direction control electrode. A slit is formed through the pixel electrode. The direction control electrode is positioned in a region aligned with the slit, and a level of a voltage applied to the direction control electrode is changed. The level of the voltage applied to the direction control electrode may be periodically changed. The voltage applied to the direction control electrode may be changed after substantially the same voltage is applied to the pixel electrode and the direction control electrode. A voltage difference between a reference voltage and the direction control voltage may be greater than a voltage difference between the reference voltage and the pixel voltage. The reference voltage may be a common voltage.

摘要翻译： 显示基板包括第一和第二存储电极，像素电极和方向控制电极。 通过像素电极形成狭缝。 方向控制电极位于与狭缝对准的区域中，并且施加到方向控制电极的电压的电平改变。 施加到方向控制电极的电压的电平可以周期性地改变。 施加到方向控制电极的电压可以在对像素电极和方向控制电极施加基本相同的电压之后改变。 参考电压和方向控制电压之间的电压差可以大于参考电压和像素电压之间的电压差。 参考电压可以是公共电压。

公开(公告)号：US07253849B2

公开(公告)日：2007-08-07

申请号：US10510013

申请日：2002-07-24

申请人： Kyoung-Ju Shin ,  Hee-Seob Kim ,  Sung-Kyu Hong ,  Baek-Woon Lee

发明人： Kyoung-Ju Shin ,  Hee-Seob Kim ,  Sung-Kyu Hong ,  Baek-Woon Lee

IPC分类号： G02F1/1368 ,  G02F1/139 ,  H01L21/336 ,  H01L29/786

CPC分类号： G02F1/133707 ,  G02F1/13624

摘要： A thin film transistor array panel is provided, which includes: a gate wire formed on an insulating substrate; a data wire formed on the insulating substrate, insulated from the gate wire, and intersecting the gate wire; a storage electrode wire formed on the insulating substrate, insulated from the data wire, and intersecting the data wire; a plurality of pixel electrodes provided on the respective pixel areas defined by the intersections of the gate wire and the data wire, each pixel electrode having a cutout; a plurality of direction control electrodes provided on the respective pixel areas defined by the intersections of the gate wire and the data wire; a plurality of first thin film transistors connected to the gate wire, the data wire, and the pixel electrodes; and a plurality of second thin film transistors connected to the gate wire, the storage electrode wire, and the direction control electrodes.

摘要翻译： 提供薄膜晶体管阵列面板，其包括：形成在绝缘基板上的栅极线; 数据线，形成在所述绝缘基板上，与所述栅极线绝缘并且与所述栅极线相交; 存储电极线，形成在所述绝缘基板上，与所述数据线绝缘并且与所述数据线相交; 设置在由栅极线和数据线的交叉点限定的各个像素区域上的多个像素电极，每个像素电极具有切口; 设置在由栅极线和数据线的交叉点限定的各个像素区域上的多个方向控制电极; 连接到栅极线，数据线和像素电极的多个第一薄膜晶体管; 以及连接到栅极线，存储电极线和方向控制电极的多个第二薄膜晶体管。

公开(公告)号：US07154569B2

公开(公告)日：2006-12-26

申请号：US10506410

申请日：2003-03-07

申请人： Baek-Woon Lee ,  Hee-Seob Kim ,  Sung-Kyu Hong ,  Kyoung-Ju Shin ,  Young-Chol Yang

发明人： Baek-Woon Lee ,  Hee-Seob Kim ,  Sung-Kyu Hong ,  Kyoung-Ju Shin ,  Young-Chol Yang

IPC分类号： G02F1/1368 ,  G02F1/1343 ,  G02F1/139 ,  G09G3/36

CPC分类号： G02F1/13624 ,  G02F1/133707 ,  G02F1/1343 ,  G02F1/134336

摘要： A thin film transistor array panel is provided, which includes: an insulating substrate (110); a plurality of control lines (121) provided on the substrate and including first and second control lines; a plurality of data lines (171) provided on the substrate and including first and second data lines; a pixel electrode (190) provided on the substrate and having a cutout (191); a field control electrode (178) provided on the substrate and overlapping the cutout; a first switching element for applying a first signal from the first data line to the pixel electrode in response to a first control signal from the first control line; and a second switching element (2) for controlling a second signal to be applied to the field control electrode (178).

公开(公告)号：US06995394B2

公开(公告)日：2006-02-07

申请号：US10733170

申请日：2003-12-11

申请人： Sung-Kyu Hong ,  Young-Chol Yang ,  Jong-Lae Kim ,  Kyoung-Ju Shin ,  Hee-Seob Kim

发明人： Sung-Kyu Hong ,  Young-Chol Yang ,  Jong-Lae Kim ,  Kyoung-Ju Shin ,  Hee-Seob Kim

IPC分类号： H01L31/20 ,  G02F1/136

CPC分类号： G02F1/13624 ,  H01L27/12 ,  H01L27/124

摘要： A thin film transistor array panel is provided, which includes: a pair of first and second gate lines; a data line intersecting the gate lines in an insulating manner; a storage electrode line supplied with a common voltage; a pixel electrode formed in a pixel area defined by the intersections of the first and the second gate lines and the data line and including a plurality of subareas partitioned by cutouts; a direction control electrode formed in the pixel area and including a portion overlapping at least one of the cutouts; a first thin film transistor connected to the pixel electrode, the first signal line, and the third signal line; a second thin film transistor connected to the pixel electrode, the second signal line, and the third signal line; and a third thin film transistor connected to the direction control electrode, the second signal line, and the fourth signal line.

摘要翻译： 提供薄膜晶体管阵列面板，其包括：一对第一和第二栅极线; 以绝缘方式与栅极线相交的数据线; 提供有公共电压的存储电极线; 形成在由第一和第二栅极线与数据线的交点限定的像素区域中的像素电极，并且包括由切口分隔的多个子区域; 方向控制电极，其形成在所述像素区域中并且包括与所述切口中的至少一个重叠的部分; 连接到像素电极，第一信号线和第三信号线的第一薄膜晶体管; 连接到像素电极，第二信号线和第三信号线的第二薄膜晶体管; 以及连接到方向控制电极，第二信号线和第四信号线的第三薄膜晶体管。

公开(公告)号：US20050206795A1

公开(公告)日：2005-09-22

申请号：US10510013

申请日：2002-07-24

申请人： Kyoung-Ju Shin ,  Hee-Seob Kim ,  Sung-Kyu Hong ,  Baek-Woon Lee

发明人： Kyoung-Ju Shin ,  Hee-Seob Kim ,  Sung-Kyu Hong ,  Baek-Woon Lee

IPC分类号： G02F1/1337 ,  G02F1/1333 ,  G02F1/1343 ,  G02F1/136 ,  G02F1/1362 ,  G02F1/1368 ,  H01L21/336 ,  H01L29/786

CPC分类号： G02F1/133707 ,  G02F1/13624

摘要： A thin film transistor array panel is provided, which includes: a gate wire formed on an insulating substrate; a data wire formed on the insulating substrate, insulated from the gate wire, and intersecting the gate wire; a storage electrode wire formed on the insulating substrate, insulated from the data wire, and intersecting the data wire; a plurality of pixel electrodes provided on the respective pixel areas defined by the intersections of the gate wire and the data wire, each pixel electrode having a cutout; a plurality of direction control electrodes provided on the respective pixel areas defined by the intersections of the gate wire and the data wire; a plurality of first thin film transistors connected to the gate wire, the data wire, and the pixel electrodes; and a plurality of second thin film transistors connected to the gate wire, the storage electrode wire, and the direction control electrodes.

摘要翻译： 提供薄膜晶体管阵列面板，其包括：形成在绝缘基板上的栅极线; 数据线，形成在所述绝缘基板上，与所述栅极线绝缘并且与所述栅极线相交; 存储电极线，形成在所述绝缘基板上，与所述数据线绝缘并且与所述数据线相交; 设置在由栅极线和数据线的交叉点限定的各个像素区域上的多个像素电极，每个像素电极具有切口; 设置在由栅极线和数据线的交叉点限定的各个像素区域上的多个方向控制电极; 连接到栅极线，数据线和像素电极的多个第一薄膜晶体管; 以及连接到栅极线，存储电极线和方向控制电极的多个第二薄膜晶体管。

公开(公告)号：US07965345B2

公开(公告)日：2011-06-21

申请号：US10793860

申请日：2004-03-08

申请人： Hee-Seob Kim ,  Young-Chol Yang ,  Kyoung-Ju Shin ,  Sung-Kyu Hong ,  Jong-Lae Kim ,  Baek-Woon Lee

发明人： Hee-Seob Kim ,  Young-Chol Yang ,  Kyoung-Ju Shin ,  Sung-Kyu Hong ,  Jong-Lae Kim ,  Baek-Woon Lee

IPC分类号： G02F1/136 ,  G02F1/1343

CPC分类号： G02F1/13624 ,  G02F1/133707 ,  G02F1/134336 ,  G02F2001/134345

摘要： A pixel electrode and a direction control electrode capacitively coupled to the pixel electrode are provided in a pixel. A pixel thin film transistor is connected to a gate line, a data line, and the pixel electrode. A direction control electrode thin film transistor is connected to a previous gate line, a previous data lines or a next data line, and the direction control electrode. The gate lines are supplied with scanning signals, and each scanning signal includes first and second pulses in a frame. The first pulse of a scanning signal is synchronized with the second pulse of a previous scanning signal.

摘要翻译： 电容耦合到像素电极的像素电极和方向控制电极设置在像素中。 像素薄膜晶体管连接到栅极线，数据线和像素电极。 方向控制电极薄膜晶体管连接到先前的栅极线，先前的数据线或下一个数据线，以及方向控制电极。 栅极线被提供有扫描信号，并且每个扫描信号包括帧中的第一和第二脉冲。 扫描信号的第一脉冲与先前扫描信号的第二脉冲同步。