摘要:
A display substrate includes first and second storage electrodes, a pixel electrode and a direction control electrode. A slit is formed through the pixel electrode. The direction control electrode is positioned in a region aligned with the slit, and a level of a voltage applied to the direction control electrode is changed. The level of the voltage applied to the direction control electrode may be periodically changed. The voltage applied to the direction control electrode may be changed after substantially the same voltage is applied to the pixel electrode and the direction control electrode. A voltage difference between a reference voltage and the direction control voltage may be greater than a voltage difference between the reference voltage and the pixel voltage. The reference voltage may be a common voltage.
摘要:
A liquid crystal display includes a first signal line disposed on a first substrate, a second signal line disposed on the first substrate and crossing the first signal line, a switching element disposed on the first substrate and connected to the first signal line and the second signal line, a first slope member disposed on the switching element and forming a ridge, a valley, and an inclined surface between the valley and the ridge, a pixel electrode disposed on the first slope member and connected to the switching element, a first alignment layer disposed on the pixel electrode and vertically aligned with respect to the surface of the first substrate, a second substrate facing the first substrate, a common electrode disposed on the second substrate, and a liquid crystal layer disposed between the first alignment layer and the common electrode.
摘要:
A liquid crystal display includes a first signal line disposed on a first substrate, a second signal line disposed on the first substrate and crossing the first signal line, a switching element disposed on the first substrate and connected to the first signal line and the second signal line, a first slope member disposed on the switching element and forming a ridge, a valley, and an inclined surface between the valley and the ridge, a pixel electrode disposed on the first slope member and connected to the switching element, a first alignment layer disposed on the pixel electrode and vertically aligned with respect to the surface of the first substrate, a second substrate facing the first substrate, a common electrode disposed on the second substrate, and a liquid crystal layer disposed between the first alignment layer and the common electrode.
摘要:
A thin film transistor (“TFT”) substrate in which the size of a pixel TFT formed in a display area is reduced using a single slit mask, and the length of the channel area of a protection TFT constituting an electrostatic discharge protection circuit formed in a non-display area is formed larger than that of the pixel TFT using the same mask pattern. The TFT substrate includes a signal line and a discharge line formed on a substrate, a signal supply pad formed on one end of the signal line to supply a signal to the signal line, and an electrostatic discharge protection circuit including at least one protection TFT including a plurality of channels formed between the signal supply pad and the discharge line and/or between the signal line and the discharge line.
摘要:
A thin film transistor (“TFT”) substrate in which the size of a pixel TFT formed in a display area is reduced using a single slit mask, and the length of the channel area of a protection TFT constituting an electrostatic discharge protection circuit formed in a non-display area is formed larger than that of the pixel TFT using the same mask pattern. The TFT substrate includes a signal line and a discharge line formed on a substrate, a signal supply pad formed on one end of the signal line to supply a signal to the signal line, and an electrostatic discharge protection circuit including at least one protection TFT including a plurality of channels formed between the signal supply pad and the discharge line and/or between the signal line and the discharge line.
摘要:
A liquid crystal display includes a substrate; a common voltage line formed on the substrate and transmitting a common voltage; a pixel electrode formed on the common voltage line and including a first subpixel electrode and a second subpixel electrode; a first thin film transistor connected to the first subpixel electrode, and including a first gate electrode, a first source electrode, and a first drain electrode; a second thin film transistor connected to the second subpixel electrode, and including a second gate electrode, a second source electrode, and a second drain electrode; a boosting capacitor connected to the first subpixel electrode; a third thin film transistor connected to the common voltage line and the boosting capacitor, and including a third gate electrode, a third source electrode, and a third drain electrode; and a fourth thin film transistor connected to the second subpixel electrode and the boosting capacitor, wherein the common voltage line is formed in the same layer as the third source electrode, and is electrically connected to the third source electrode.
摘要:
A liquid crystal display device includes a first thin film transistor connected to a first data line and controlling a first voltage output, a second thin film transistor connected to a second data line parallel to the first data line and controlling a second voltage output, a third thin film transistor connected to a third data line disposed between the first data line and the second data line and controlling a third voltage output, a first liquid crystal capacitor electrically connected to the first thin film transistor and the third thin film transistor, and a second liquid crystal capacitor electrically connected to the second thin film transistor and the third thin film transistor.
摘要:
A liquid crystal display device includes a first thin film transistor connected to a first data line and controlling a first voltage output, a second thin film transistor connected to a second data line parallel to the first data line and controlling a second voltage output, a third thin film transistor connected to a third data line disposed between the first data line and the second data line and controlling a third voltage output, a first liquid crystal capacitor electrically connected to the first thin film transistor and the third thin film transistor, and a second liquid crystal capacitor electrically connected to the second thin film transistor and the third thin film transistor.
摘要:
An array substrate includes a first pixel electrode and a second pixel electrode. The first pixel electrode includes first branch electrode portions and second branch electrode portions. The first branch electrode portions are disposed in a first area of a unit pixel area and are substantially parallel to a first side of the unit pixel area. The second branch electrode portions are disposed in a second area of the unit pixel area and are substantially parallel to a second side of the unit pixel area. The second pixel electrode includes third branch electrode portions disposed between the first branch electrode portions and fourth branch electrode portions disposed between the second branch electrode portions.
摘要:
A liquid crystal display includes a substrate; a common voltage line formed on the substrate and transmitting a common voltage; a pixel electrode formed on the common voltage line and including a first subpixel electrode and a second subpixel electrode; a first thin film transistor connected to the first subpixel electrode, and including a first gate electrode, a first source electrode, and a first drain electrode; a second thin film transistor connected to the second subpixel electrode, and including a second gate electrode, a second source electrode, and a second drain electrode; a boosting capacitor connected to the first subpixel electrode; a third thin film transistor connected to the common voltage line and the boosting capacitor, and including a third gate electrode, a third source electrode, and a third drain electrode; and a fourth thin film transistor connected to the second subpixel electrode and the boosting capacitor, wherein the common voltage line is formed in the same layer as the third source electrode, and is electrically connected to the third source electrode.