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    Method of driving a gate line and gate drive circuit for performing the method
    1.
    发明授权
    Method of driving a gate line and gate drive circuit for performing the method 有权
    驱动用于执行该方法的栅极线和栅极驱动电路的方法

    公开(公告)号：US08565370B2

    公开(公告)日：2013-10-22

    申请号：US13612532

    申请日：2012-09-12

    申请人： Hong-Woo Lee ,  Sung-Man Kim ,  Jong-Hyuk Lee ,  Jong-Hwan Lee ,  Hyeon-Hwan Kim ,  Sang-Moon Moh ,  Jeong-Il Kim ,  Yeon-Kyu Moon

    发明人： Hong-Woo Lee ,  Sung-Man Kim ,  Jong-Hyuk Lee ,  Jong-Hwan Lee ,  Hyeon-Hwan Kim ,  Sang-Moon Moh ,  Jeong-Il Kim ,  Yeon-Kyu Moon

    IPC分类号： G11C19/00

    CPC分类号： G11C19/28 ,  G09G3/3677 ,  G09G2300/0408

    摘要： A pull-up driving part maintains a signal of a first node at a high level by receiving a turn-on voltage in response to one of a previous stage or a vertical start signal. A pull-up part outputs a clock signal through an output terminal in response to the signal of the first node. A first holding part maintains a signal of a second node at a high level or a low level when the signal of the first node is respectively low or high. A second holding part maintains the signal of the first node and a signal of the output terminal at a ground voltage in response to the signal of the second node or a delayed and inverted clock signal.

    摘要翻译： 上拉驱动部分通过响应于前一级或垂直启动信号之一接收导通电压而将第一节点的信号保持在高电平。 上拉部分响应于第一节点的信号通过输出端子输出时钟信号。 当第一节点的信号分别为低或高时，第一保持部件将第二节点的信号保持在高电平或低电平。 第二保持部分响应于第二节点的信号或延迟和反相的时钟信号，将第一节点的信号和输出端的信号保持在接地电压。

    METHOD OF DRIVING A GATE LINE AND GATE DRIVE CIRCUIT FOR PERFORMING THE METHOD
    2.
    发明申请
    METHOD OF DRIVING A GATE LINE AND GATE DRIVE CIRCUIT FOR PERFORMING THE METHOD 有权
    驱动门线和门驱动电路的方法，用于执行方法

    公开(公告)号：US20130002309A1

    公开(公告)日：2013-01-03

    申请号：US13612532

    申请日：2012-09-12

    申请人： HONG-WOO LEE ,  Sung-Man Kim ,  Jong-Hyuk Lee ,  Jong-Hwan Lee ,  Hyeon-Hwan Kim ,  Sang-Moon Moh ,  Jeong-Il Kim ,  Yeon-Kyu Moon

    发明人： HONG-WOO LEE ,  Sung-Man Kim ,  Jong-Hyuk Lee ,  Jong-Hwan Lee ,  Hyeon-Hwan Kim ,  Sang-Moon Moh ,  Jeong-Il Kim ,  Yeon-Kyu Moon

    IPC分类号： H03K3/00

    CPC分类号： G11C19/28 ,  G09G3/3677 ,  G09G2300/0408

    摘要： A pull-up driving part maintains a signal of a first node at a high level by receiving a turn-on voltage in response to one of a previous stage or a vertical start signal. A pull-up part outputs a clock signal through an output terminal in response to the signal of the first node. A first holding part maintains a signal of a second node at a high level or a low level when the signal of the first node is respectively low or high. A second holding part maintains the signal of the first node and a signal of the output terminal at a ground voltage in response to the signal of the second node or a delayed and inverted clock signal.

    摘要翻译： 上拉驱动部分通过响应于前一级或垂直启动信号之一接收导通电压而将第一节点的信号保持在高电平。 上拉部分响应于第一节点的信号通过输出端子输出时钟信号。 当第一节点的信号分别为低或高时，第一保持部件将第二节点的信号保持在高电平或低电平。 第二保持部分响应于第二节点的信号或延迟和反相的时钟信号，将第一节点的信号和输出端的信号保持在接地电压。

    Method of driving a gate line and gate drive circuit for performing the method
    4.
    发明授权
    Method of driving a gate line and gate drive circuit for performing the method 有权
    驱动用于执行该方法的栅极线和栅极驱动电路的方法

    公开(公告)号：US08306177B2

    公开(公告)日：2012-11-06

    申请号：US12575895

    申请日：2009-10-08

    申请人： Hong-Woo Lee ,  Sung-Man Kim ,  Jong-Hyuk Lee ,  Jong-Hwan Lee ,  Hyeon-Hwan Kim ,  Sang-Moon Moh ,  Jeong-Il Kim ,  Yeon-Kyu Moon

    发明人： Hong-Woo Lee ,  Sung-Man Kim ,  Jong-Hyuk Lee ,  Jong-Hwan Lee ,  Hyeon-Hwan Kim ,  Sang-Moon Moh ,  Jeong-Il Kim ,  Yeon-Kyu Moon

    IPC分类号： G11C19/00

    CPC分类号： G11C19/28 ,  G09G3/3677 ,  G09G2300/0408

    摘要： A pull-up driving part maintains a signal of a first node at a high level by receiving a turn-on voltage in response to one of a previous stage or a vertical start signal. A pull-up part outputs a clock signal through an output terminal in response to the signal of the first node. A first holding part maintains a signal of a second node at a high level or a low level when the signal of the first node is respectively low or high. A second holding part maintains the signal of the first node and a signal of the output terminal at a ground voltage in response to the signal of the second node or a delayed and inverted clock signal.

    摘要翻译： 上拉驱动部分通过响应于前一级或垂直启动信号之一接收导通电压而将第一节点的信号保持在高电平。 上拉部分响应于第一节点的信号通过输出端子输出时钟信号。 当第一节点的信号分别为低或高时，第一保持部件将第二节点的信号保持在高电平或低电平。 第二保持部分响应于第二节点的信号或延迟和反相的时钟信号，将第一节点的信号和输出端的信号保持在接地电压。

    Ripple preventing gate driving circuit and display apparatus having the same
    7.
    发明授权
    Ripple preventing gate driving circuit and display apparatus having the same 失效
    波纹防止栅极驱动电路及其显示装置

    公开(公告)号：US08264443B2

    公开(公告)日：2012-09-11

    申请号：US12241880

    申请日：2008-09-30

    申请人： Hong-Woo Lee ,  Hyeon-Hwan Kim ,  Byeong-Jae Ahn ,  Sun-Hyung Kim ,  Sung-Man Kim ,  Bong-Jun Lee

    发明人： Hong-Woo Lee ,  Hyeon-Hwan Kim ,  Byeong-Jae Ahn ,  Sun-Hyung Kim ,  Sung-Man Kim ,  Bong-Jun Lee

    IPC分类号： G09G3/36

    CPC分类号： G09G3/3677

    摘要： A gate driving circuit includes stages, the stages being cascaded and each including: a pull-up part which pulls up a gate voltage to a clock signal during a horizontal scanning period (1H); a carry part which pulls up a carry voltage to the clock signal during the horizontal scanning period (1H); a pull-up driving part connected to a control terminal (Q-node) common to the carry part and the pull-up part and which receives a previous carry voltage from a first previous stage to turn on the pull-up part and the carry part; and a ripple preventing part which prevents a ripple generated at a previous Q-node of a second previous stage based on a ripple generated at the Q-node of the carry part and the pull-up part.

    摘要翻译： 门驱动电路包括级级，级联级，每级包括：在水平扫描周期（1H）期间将门电压上拉至时钟信号的上拉部分; 在水平扫描期间（1H）中将进位电压拉入时钟信号的进位部分; 上拉驱动部分连接到与进位部分和上拉部分共同的控制端子（Q-节点），并且从上一级接收先前的进位电压以接通上拉部分和进位 部分; 以及纹波防止部，其基于在所述进位部和所述上拉部的所述Q节点处产生的波纹来防止在前一级的前一Q点产生的纹波。

    Gate driver and display apparatus having the same
    8.
    发明授权
    Gate driver and display apparatus having the same 有权
    门驱动器和显示装置具有相同的功能

    公开(公告)号：US08194026B2

    公开(公告)日：2012-06-05

    申请号：US11782957

    申请日：2007-07-25

    申请人： Hong-Woo Lee ,  Myung-Koo Hur ,  Jong-Hwan Lee ,  Beom-Jun Kim ,  Sung-Man Kim

    发明人： Hong-Woo Lee ,  Myung-Koo Hur ,  Jong-Hwan Lee ,  Beom-Jun Kim ,  Sung-Man Kim

    IPC分类号： G09G3/36

    CPC分类号： G09G3/3677 ,  G09G2300/0408 ,  G09G2310/0267 ,  G09G2320/02 ,  G09G2330/08 ,  G11C19/28

    摘要： A gate driver comprises a shift register that has a plurality of stages connected together and outputs a gate signal comprising a first pulse and a second pulse to a gate line. A stage includes a holding part, a pre-charging part, a pull-up part, and a pull-down part. The holding part discharges an output terminal to an off-voltage in response to a first clock signal. The pre-charging part turns off the holding part and outputs the first clock signal as the first pulse to the output terminal in response to an output signal of a previous stage. The pull-up part outputs a second clock signal as the second pulse to the output terminal in response to the output signal of the previous stage. The pull-down part discharges the first output terminal to the off-voltage in response to an output signal of a next stage.

    摘要翻译： 栅极驱动器包括具有连接在一起的多个级的移位寄存器，并将包括第一脉冲和第二脉冲的门信号输出到栅极线。 舞台包括保持部分，预充电部分，上拉部分和下拉部分。 保持部分响应于第一时钟信号将输出端子放电到截止电压。 预充电部件关闭保持部件，并响应于前一级的输出信号将第一时钟信号作为第一脉冲输出到输出端子。 上拉部分响应于前一级的输出信号，将第二时钟信号作为第二脉冲输出到输出端。 下拉部分响应于下一级的输出信号将第一输出端子放电到截止电压。

    LIQUID CRYSTAL DISPLAY DEVICE
    9.
    发明申请
    LIQUID CRYSTAL DISPLAY DEVICE 有权
    液晶显示装置

    公开(公告)号：US20090219477A1

    公开(公告)日：2009-09-03

    申请号：US12464420

    申请日：2009-05-12

    申请人： Sung-Man Kim ,  Myung-Koo Hur ,  Jong-Hwan Lee ,  Yong Woo Lee ,  Hong-Woo Lee ,  Jin-Suk Seo

    发明人： Sung-Man Kim ,  Myung-Koo Hur ,  Jong-Hwan Lee ,  Yong Woo Lee ,  Hong-Woo Lee ,  Jin-Suk Seo

    IPC分类号： G02F1/1343

    CPC分类号： G02F1/133707

    摘要： Disclosed is a liquid crystal display device including a first substrate, a second substrate, and a liquid crystal layer interposed there between. The first substrate is provided with gate lines and data lines thereon. The gate lines and data lines cross with each other and are insulated from each other. Pixel electrodes are stacked on the gate lines and data lines. Each pixel electrode includes first and second sub-pixel electrodes spaced apart from each other and a connection electrode, which connects the first sub-pixel electrode to the second sub-pixel electrode. The second substrate is provided with a common electrode thereon. The common electrode includes a first domain divider formed on the center of the first sub-pixel electrode and a second domain divider formed on the center of the second sub-pixel electrode.

    摘要翻译： 公开了一种液晶显示装置，包括第一基板，第二基板和介于其间的液晶层。 第一基板上设置有栅线和数据线。 栅极线和数据线彼此交叉并且彼此绝缘。 像素电极堆叠在栅极线和数据线上。 每个像素电极包括彼此间隔开的第一和第二子像素电极和将第一子像素电极连接到第二子像素电极的连接电极。 第二基板上设置有公共电极。 公共电极包括形成在第一子像素电极的中心上的第一域分隔器和形成在第二子像素电极的中心的第二域分隔器。

    Liquid crystal display device
    10.
    发明授权
    Liquid crystal display device 有权
    液晶显示装置

    公开(公告)号：US08259274B2

    公开(公告)日：2012-09-04

    申请号：US12464420

    申请日：2009-05-12

    申请人： Sung-Man Kim ,  Myung-Koo Hur ,  Jong-Hwan Lee ,  Yong Woo Lee ,  Hong-Woo Lee ,  Jin-Suk Seo

    发明人： Sung-Man Kim ,  Myung-Koo Hur ,  Jong-Hwan Lee ,  Yong Woo Lee ,  Hong-Woo Lee ,  Jin-Suk Seo

    IPC分类号： G02F1/1337 ,  G02F1/1343

    CPC分类号： G02F1/133707

    摘要： Disclosed is a liquid crystal display device including a first substrate, a second substrate, and a liquid crystal layer interposed there between. The first substrate is provided with gate lines and data lines thereon. The gate lines and data lines cross with each other and are insulated from each other. Pixel electrodes are stacked on the gate lines and data lines. Each pixel electrode includes first and second sub-pixel electrodes spaced apart from each other and a connection electrode, which connects the first sub-pixel electrode to the second sub-pixel electrode. The second substrate is provided with a common electrode thereon. The common electrode includes a first domain divider formed on the center of the first sub-pixel electrode and a second domain divider formed on the center of the second sub-pixel electrode.

    摘要翻译： 公开了一种液晶显示装置，包括第一基板，第二基板和介于其间的液晶层。 第一基板上设置有栅线和数据线。 栅极线和数据线彼此交叉并且彼此绝缘。 像素电极堆叠在栅极线和数据线上。 每个像素电极包括彼此间隔开的第一和第二子像素电极和将第一子像素电极连接到第二子像素电极的连接电极。 第二基板上设置有公共电极。 公共电极包括形成在第一子像素电极的中心上的第一域分隔器和形成在第二子像素电极的中心的第二域分隔器。