Gate driving circuit having improved tolerance to gate voltage ripple and display device having the same
    1.
    发明授权
    Gate driving circuit having improved tolerance to gate voltage ripple and display device having the same 有权
    栅极驱动电路具有改善的对栅极电压纹波的容限和具有其的显示器件

    公开(公告)号:US08305326B2

    公开(公告)日:2012-11-06

    申请号:US12218814

    申请日:2008-07-18

    IPC分类号: G09G3/36

    摘要: A gate driving circuit and a display device having the same, a pull-up unit pulls up a current gate signal by using a first clock signal during a first period of one frame. A pull-up driver coupled to the pull-up unit receives a carry signal from one of the previous stages to turn on the pull-up unit. A pull-up unit receives a gate signal from one of the next stages, discharges the current gate signal to an off voltage level, and turns off the pull-up unit. A holder holds the current gate signal at the voltage level. An inverter turns on/off the holder in response to a first clock signal. A ripple preventer has a source and a gate coupled in common to an output terminal of the pull-up unit and a drain coupled to an input terminal of the inverter, and includes a ripple preventing diode for preventing a ripple from being applied to the inverter.

    摘要翻译: 一种栅极驱动电路和具有该栅极驱动电路的显示装置,上拉单元在一帧的第一周期期间通过使用第一时钟信号来上拉电流门信号。 耦合到上拉单元的上拉驱动器从前一级之一接收进位信号,以接通上拉单元。 上拉单元接收来自下一级中的一个的门信号,将当前门信号放电至截止电压电平,并关闭上拉单元。 持有者将当前门信号保持在电压电平。 逆变器响应于第一个时钟信号打开/关闭支架。 波纹防止器具有与上拉单元的输出端子共同耦合的源极和栅极,以及耦合到反相器的输入端子的漏极,并且包括用于防止纹波施加到逆变器的纹波防止二极管 。

    Gate driving circuit and display device having the same
    2.
    发明申请
    Gate driving circuit and display device having the same 有权
    栅极驱动电路及其显示装置

    公开(公告)号:US20090040203A1

    公开(公告)日:2009-02-12

    申请号:US12218814

    申请日:2008-07-18

    IPC分类号: G06F3/038

    摘要: A gate driving circuit and a display device having the same, a pull-up unit pulls up a current gate signal by using a first clock signal during a first period of one frame. A pull-up driver coupled to the pull-up unit receives a carry signal from one of the previous stages to turn on the pull-up unit. A pull-up unit receives a gate signal from one of the next stages, discharges the current gate signal to an off voltage level, and turns off the pull-up unit. A holder holds the current gate signal at the voltage level. An inverter turns on/off the holder in response to a first clock signal. A ripple preventer has a source and a gate coupled in common to an output terminal of the pull-up unit and a drain coupled to an input terminal of the inverter, and includes a ripple preventing diode for preventing a ripple from being applied to the inverter.

    摘要翻译: 一种栅极驱动电路和具有该栅极驱动电路的显示装置,上拉单元在一帧的第一周期期间通过使用第一时钟信号来上拉电流门信号。 耦合到上拉单元的上拉驱动器从前一级之一接收进位信号,以接通上拉单元。 上拉单元接收来自下一级中的一个的门信号,将当前门信号放电至截止电压电平,并关闭上拉单元。 持有者将当前门信号保持在电压电平。 逆变器响应于第一个时钟信号打开/关闭支架。 波纹防止器具有与上拉单元的输出端子共同耦合的源极和栅极,以及耦合到反相器的输入端子的漏极,并且包括用于防止纹波施加到逆变器的纹波防止二极管 。

    Gate driver and display apparatus having the same
    3.
    发明授权
    Gate driver and display apparatus having the same 有权
    门驱动器和显示装置具有相同的功能

    公开(公告)号:US08194026B2

    公开(公告)日:2012-06-05

    申请号:US11782957

    申请日:2007-07-25

    IPC分类号: G09G3/36

    摘要: A gate driver comprises a shift register that has a plurality of stages connected together and outputs a gate signal comprising a first pulse and a second pulse to a gate line. A stage includes a holding part, a pre-charging part, a pull-up part, and a pull-down part. The holding part discharges an output terminal to an off-voltage in response to a first clock signal. The pre-charging part turns off the holding part and outputs the first clock signal as the first pulse to the output terminal in response to an output signal of a previous stage. The pull-up part outputs a second clock signal as the second pulse to the output terminal in response to the output signal of the previous stage. The pull-down part discharges the first output terminal to the off-voltage in response to an output signal of a next stage.

    摘要翻译: 栅极驱动器包括具有连接在一起的多个级的移位寄存器,并将包括第一脉冲和第二脉冲的门信号输出到栅极线。 舞台包括保持部分,预充电部分,上拉部分和下拉部分。 保持部分响应于第一时钟信号将输出端子放电到截止电压。 预充电部件关闭保持部件,并响应于前一级的输出信号将第一时钟信号作为第一脉冲输出到输出端子。 上拉部分响应于前一级的输出信号,将第二时钟信号作为第二脉冲输出到输出端。 下拉部分响应于下一级的输出信号将第一输出端子放电到截止电压。

    LIQUID CRYSTAL DISPLAY DEVICE
    5.
    发明申请
    LIQUID CRYSTAL DISPLAY DEVICE 有权
    液晶显示装置

    公开(公告)号:US20080043191A1

    公开(公告)日:2008-02-21

    申请号:US11839752

    申请日:2007-08-16

    IPC分类号: G02F1/1343

    CPC分类号: G02F1/133707

    摘要: Disclosed is a liquid crystal display device including a first substrate, a second substrate, and a liquid crystal layer interposed there between. The first substrate is provided with gate lines and data lines thereon. The gate lines and data lines cross with each other and are insulated from each other. Pixel electrodes are stacked on the gate lines and data lines. Each pixel electrode includes first and second sub-pixel electrodes spaced apart from each other and a connection electrode, which connects the first sub-pixel electrode to the second sub-pixel electrode. The second substrate is provided with a common electrode thereon. The common electrode includes a first domain divider formed on the center of the first sub-pixel electrode and a second domain divider formed on the center of the second sub-pixel electrode.

    摘要翻译: 公开了一种液晶显示装置,包括第一基板,第二基板和介于其间的液晶层。 第一基板上设置有栅线和数据线。 栅极线和数据线彼此交叉并且彼此绝缘。 像素电极堆叠在栅极线和数据线上。 每个像素电极包括彼此间隔开的第一和第二子像素电极和将第一子像素电极连接到第二子像素电极的连接电极。 第二基板上设置有公共电极。 公共电极包括形成在第一子像素电极的中心上的第一域分隔器和形成在第二子像素电极的中心的第二域分隔器。

    Liquid crystal display device
    6.
    发明授权
    Liquid crystal display device 有权
    液晶显示装置

    公开(公告)号:US08259274B2

    公开(公告)日:2012-09-04

    申请号:US12464420

    申请日:2009-05-12

    IPC分类号: G02F1/1337 G02F1/1343

    CPC分类号: G02F1/133707

    摘要: Disclosed is a liquid crystal display device including a first substrate, a second substrate, and a liquid crystal layer interposed there between. The first substrate is provided with gate lines and data lines thereon. The gate lines and data lines cross with each other and are insulated from each other. Pixel electrodes are stacked on the gate lines and data lines. Each pixel electrode includes first and second sub-pixel electrodes spaced apart from each other and a connection electrode, which connects the first sub-pixel electrode to the second sub-pixel electrode. The second substrate is provided with a common electrode thereon. The common electrode includes a first domain divider formed on the center of the first sub-pixel electrode and a second domain divider formed on the center of the second sub-pixel electrode.

    摘要翻译: 公开了一种液晶显示装置,包括第一基板,第二基板和介于其间的液晶层。 第一基板上设置有栅线和数据线。 栅极线和数据线彼此交叉并且彼此绝缘。 像素电极堆叠在栅极线和数据线上。 每个像素电极包括彼此间隔开的第一和第二子像素电极和将第一子像素电极连接到第二子像素电极的连接电极。 第二基板上设置有公共电极。 公共电极包括形成在第一子像素电极的中心上的第一域分隔器和形成在第二子像素电极的中心的第二域分隔器。

    Gate driving circuit and display apparatus having the same
    7.
    发明授权
    Gate driving circuit and display apparatus having the same 有权
    栅极驱动电路及其显示装置

    公开(公告)号:US07932887B2

    公开(公告)日:2011-04-26

    申请号:US11761149

    申请日:2007-06-11

    IPC分类号: G09G3/36

    摘要: A gate driving circuit includes stages connected in series. In a stage, a pull-up part pulls up a present gate signal to a level of a first clock signal, and a pull-down part receives a next gate signal from a next stage to discharge the present gate signal to an off-voltage. A pull-up driving part turns on or turns off the pull-up part and the carry part. A holding part holds the present gate signal at the off-voltage and a present inverter turns on or turns off the holding part in response to the first clock signal. A ripple preventing capacitor is connected between a present node and an output terminal of a previous stage's inverter to prevent a ripple at the present Q-node in response to an output signal from the previous inverter.

    摘要翻译: 栅极驱动电路包括串联连接的级。 在一个阶段中,上拉部分将当前栅极信号提升到第一时钟信号的电平,并且下拉部分从下一级接收下一个栅极信号,以将当前栅极信号放电到截止电压 。 上拉驱动部分打开或关闭上拉部分和进位部分。 保持部分将当前门信号保持在截止电压,并且本逆变器响应于第一时钟信号而导通或关断保持部分。 防波电容器连接在前级逆变器的当前节点和输出端之间,以防止来自前一个逆变器的输出信号在当前Q节点处产生纹波。

    Liquid crystal display device
    9.
    发明授权
    Liquid crystal display device 有权
    液晶显示装置

    公开(公告)号:US07564527B2

    公开(公告)日:2009-07-21

    申请号:US11839752

    申请日:2007-08-16

    IPC分类号: G02F1/1337

    CPC分类号: G02F1/133707

    摘要: Disclosed is a liquid crystal display device including a first substrate, a second substrate, and a liquid crystal layer interposed there between. The first substrate is provided with gate lines and data lines thereon. The gate lines and data lines cross with each other and are insulated from each other. Pixel electrodes are stacked on the gate lines and data lines. Each pixel electrode includes first and second sub-pixel electrodes spaced apart from each other and a connection electrode, which connects the first sub-pixel electrode to the second sub-pixel electrode. The second substrate is provided with a common electrode thereon. The common electrode includes a first domain divider formed on the center of the first sub-pixel electrode and a second domain divider formed on the center of the second sub-pixel electrode.

    摘要翻译: 公开了一种液晶显示装置,包括第一基板,第二基板和介于其间的液晶层。 第一基板上设置有栅线和数据线。 栅极线和数据线彼此交叉并且彼此绝缘。 像素电极堆叠在栅极线和数据线上。 每个像素电极包括彼此间隔开的第一和第二子像素电极和将第一子像素电极连接到第二子像素电极的连接电极。 第二基板上设置有公共电极。 公共电极包括形成在第一子像素电极的中心上的第一域分隔器和形成在第二子像素电极的中心的第二域分隔器。

    Array substrate and display apparatus having the same
    10.
    发明授权
    Array substrate and display apparatus having the same 有权
    阵列基板及其显示装置

    公开(公告)号:US07816683B2

    公开(公告)日:2010-10-19

    申请号:US11839125

    申请日:2007-08-15

    IPC分类号: H01L31/00 G09G3/36 G02F1/135

    摘要: In an array substrate and a display apparatus, a gate line receives a gate pulse during a present 1H period and a data line receives a pixel voltage having a polarity inverted at every frame. When a thin film transistor is turned on in response to the gate pulse during the present 1H period, a pixel electrode receives the pixel voltage through the thin film transistor during the present 1H period. A pre-charging part pre-charges the pixel electrode to a common voltage that is a reference voltage of the pixel voltage in response to a previous gate pulse during a previous 1H period.

    摘要翻译: 在阵列基板和显示装置中,栅极线在当前1H周期期间接收栅极脉冲,并且数据线接收每帧具有极性反转的像素电压。 当在本1H时段期间响应于栅极脉冲导通薄膜晶体管时,像素电极在本1H时段期间通过薄膜晶体管接收像素电压。 预充电部分将像素电极预充电到作为像素电压的参考电压的公共电压,该公共电压响应于之前的1H周期期间的先前的栅极脉冲。