Memory safeguard device for microprocessor
    1.
    发明授权
    Memory safeguard device for microprocessor 失效
    微处理器内存保护装置

    公开(公告)号:US4715016A

    公开(公告)日:1987-12-22

    申请号:US784773

    申请日:1985-10-07

    CPC分类号: G06F1/30 G06F1/24

    摘要: A microprocessor memory safeguard device comprising a switch having two it terminals and a common terminal. The common terminal is connected to a first terminal of the memory and to the logic zero of the microprocessor. The other input terminal of the switch is connected to one terminal of a battery. The second terminal of the memory is connected to the other terminal of the battery. The second input terminal of the switch is connected to an initialization line of the processor whose initialization input is also connected to the line. The initialization line is connected directly to a power supply source. The initialization line could also be a data bus interconnecting a plurality of microprocessors.

    摘要翻译: 一种微处理器存储器保护装置,包括具有两个输入端和公共端的开关。 公共端子连接到存储器的第一端子和微处理器的逻辑零点。 开关的另一个输入端子连接到电池的一个端子。 存储器的第二端子连接到电池的另一个端子。 开关的第二输入端子连接到处理器的初始化线,其初始化输入也连接到线路。 初始化线路直接连接到电源。 初始化线还可以是互连多个微处理器的数据总线。

    Electric power supply device for microprocessors
    2.
    发明授权
    Electric power supply device for microprocessors 失效
    微处理器用电源装置

    公开(公告)号:US4768147A

    公开(公告)日:1988-08-30

    申请号:US784774

    申请日:1985-10-07

    申请人: Sylves Lamiaux

    发明人: Sylves Lamiaux

    CPC分类号: G06F1/30 G06F1/24

    摘要: A device is provided for supplying microprocessors with electricity, comprising a source for supplying with power microprocessors interconnected by a bus. The source has an initialization output connected directly to a bus so that the microprocessors do not execute their programs during the rise in voltage. Each microprocessor comprises an initialization counter also connected to the bus for recognizing the initialization signal of the source. Each microprocessor also comprises its own initialization generator adapted for detecting an absence of traffic on the bus and for emitting an initialization signal over the bus in the case of "unbuckling" of one of the microprocessors.

    摘要翻译: 提供一种用于向微处理器供电的装置,包括用于供应通过总线互连的电力微处理器的源。 源具有直接连接到总线的初始化输出,使得微处理器在电压上升期间不执行其程序。 每个微处理器都包括一个初始化计数器,它也连接到总线上,用于识别源的初始化信号。 每个微处理器还包括其自己的初始化发生器,适用于在总线上检测到不存在业务,并且在微处理器之一的“解开”情况下,通过总线发出初始化信号。

    Process for interconnecting microprocessors
    3.
    发明授权
    Process for interconnecting microprocessors 失效
    互连微处理器的过程

    公开(公告)号:US4827398A

    公开(公告)日:1989-05-02

    申请号:US754728

    申请日:1985-07-15

    申请人: Sylves Lamiaux

    发明人: Sylves Lamiaux

    CPC分类号: G06F13/24 G06F15/17

    摘要: In a process for interconnecting microprocessors, a master microprocessor (1) transmits a character. All the slave microprocessors receive it in a register (4). If processing is in progress in the slave (2) for which it is intended, the character is masked until the processing is finished. After the processing, the slave microprocessor (2) recognizes it, removes it from the register (4) and loads this latter with an echo intended for the master microprocessor (1), allowing it to transmit a new character.

    摘要翻译: 在用于互连微处理器的过程中,主微处理器(1)发送字符。 所有从属微处理器都在寄存器(4)中接收。 如果正在进行处理正在进行中的从属(2),则该字符被屏蔽,直到处理完成。 在处理之后,从属微处理器(2)识别它,将其从寄存器(4)中移除,并将其装入用于主微处理器(1)的回波,从而允许其发送新的字符。