公开(公告)号：US20240355671A1

公开(公告)日：2024-10-24

申请号：US18758180

申请日：2024-06-28

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

Inventor： LIN-YU HUANG ,  LI-ZHEN YU ,  CHIA-HAO CHANG ,  CHENG-CHI CHUANG ,  CHIH-HAO WANG ,  KUAN-LUN CHENG

IPC: H01L21/768 ,  H01L23/532

CPC classification number: H01L21/7682 ,  H01L23/5329 ,  H01L21/76807 ,  H01L23/53238

Abstract: A semiconductor device structure, along with methods of forming such, are described. The semiconductor device structure includes a device, a conductive structure disposed over the device, and the conductive structure includes a sidewall having a first portion and a second portion. The semiconductor device structure further includes a first spacer layer including a third portion and a fourth portion, the third portion surrounds the first portion of the sidewall, and the fourth portion is disposed on the conductive structure. The semiconductor device structure further includes a first dielectric material surrounding the third portion, and an air gap is formed between the first dielectric material and the third portion of the first spacer layer. The first dielectric material includes a first material different than a second material of the first spacer layer, and the first dielectric material is substantially coplanar with the fourth portion of the first spacer layer.

公开(公告)号：US20220359267A1

公开(公告)日：2022-11-10

申请号：US17874639

申请日：2022-07-27

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

Inventor： LIN-YU HUANG ,  LI-ZHEN YU ,  CHIA-HAO CHANG ,  CHENG-CHI CHUANG ,  KUAN-LUN CHENG ,  CHIH-HAO WANG

IPC: H01L21/768 ,  H01L23/532

Abstract: A semiconductor device structure, along with methods of forming such, are described. The semiconductor device structure includes a device, a conductive structure disposed over the device, and the conductive structure includes a sidewall having a first portion and a second portion. The semiconductor device structure further includes a first spacer layer including a third portion and a fourth portion, the third portion surrounds the first portion of the sidewall, and the fourth portion is disposed on the conductive structure. The semiconductor device structure further includes a first dielectric material surrounding the third portion, and an air gap is formed between the first dielectric material and the third portion of the first spacer layer. The first dielectric material includes a first material different than a second material of the first spacer layer, and the first dielectric material is substantially coplanar with the fourth portion of the first spacer layer.

公开(公告)号：US20220375850A1

公开(公告)日：2022-11-24

申请号：US17874886

申请日：2022-07-27

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

Inventor： LIN-YU HUANG ,  LI-ZHEN YU ,  CHIA-HAO CHANG ,  CHENG-CHI CHUANG ,  KUAN-LUN CHENG ,  CHIH-HAO WANG

IPC: H01L23/522 ,  H01L21/768 ,  H01L23/532

Abstract: A semiconductor device structure, along with methods of forming such, are described. The semiconductor device structure includes a device, a first dielectric material disposed over the device, and an opening is formed in the first dielectric material. The semiconductor device structure further includes a conductive structure disposed in the opening, and the conductive structure includes a first sidewall. The semiconductor device structure further includes a surrounding structure disposed in the opening, and the surrounding structure surrounds the first sidewall of the conductive structure. The surrounding structure includes a first spacer layer and a second spacer layer adjacent the first spacer layer. The first spacer layer is separated from the second spacer layer by an air gap.

公开(公告)号：US20250063808A1

公开(公告)日：2025-02-20

申请号：US18451137

申请日：2023-08-17

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.

Inventor： KUAN-TING PAN ,  JIA-CHUAN YOU ,  CHIA-HAO CHANG ,  KUO-CHENG CHIANG ,  CHIH-HAO WANG

IPC: H01L27/088 ,  H01L21/8234 ,  H01L29/06 ,  H01L29/423 ,  H01L29/66 ,  H01L29/775

Abstract: A semiconductor structure includes a first dielectric wall over a substrate, and two metal gate structures disposed at two sides of the first dielectric wall. Each of the metal gate structures includes a plurality of nanosheets stacked over the substrate and separated from each other, a high-k gate dielectric layer covering each of the nanosheets, and a metal layer covering and over the plurality of nanosheets and the high-k gate dielectric layer. The high-k gate dielectric layer of each metal gate structure is disposed between the metal layer of each metal gate structure and the first dielectric wall.