公开(公告)号：US20220122914A1

公开(公告)日：2022-04-21

申请号：US17229345

申请日：2021-04-13

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

发明人： Shao-Ting WU ,  Meng-Sheng CHANG ,  Shao-Yu CHOU ,  Chung-I HUANG

IPC分类号： H01L23/525 ,  H01L27/112

摘要： A fusible structure includes a metal line with different portions having different thicknesses. Thinner portions of the metal line are designed to be destructively altered at lower voltages while thicker portions of the metal line are designed to be destructively altered at lower voltages. Furthermore, one or more dummy structures are disposed proximal to the thinner portions of the metal line. In some embodiments, dummy structures are placed with sufficient proximity so as to protect against metal sputtering when metal line is destructively altered.

公开(公告)号：US20220384339A1

公开(公告)日：2022-12-01

申请号：US17885321

申请日：2022-08-10

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

发明人： Shao-Ting WU ,  Meng-Sheng CHANG ,  Shao-Yu CHOU ,  Chung-I HUANG

IPC分类号： H01L23/525 ,  H01L27/112

摘要： A method (fabricating a fusible structure) includes forming a metal line that extends in a first direction, the forming a metal line including: configuring the mask such that the metal line has a first portion that is between a second portion and a third portion; and using an optical proximity correction technique with a mask so that the first portion has a first thickness that is thinner than a second thickness of each of the second portion and the third portion; and forming a first dummy structure proximal to the metal line and aligned with the first portion relative to the first direction.

公开(公告)号：US20220028453A1

公开(公告)日：2022-01-27

申请号：US17209965

申请日：2021-03-23

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

发明人： Perng-Fei YUH ,  Shao-Ting WU ,  Yu-Fan LIN

IPC分类号： G11C13/00

摘要： A bias voltage generator includes a first current path, a first voltage clamp device, and a first buffer. The bias voltage generator receives a reference voltage and generates a first bias voltage based on a voltage difference between the reference voltage and a first drive voltage, the first voltage clamp device generates the first drive voltage based on the first bias voltage by applying the first drive voltage to the first current path, and the first buffer receives the first bias voltage and generates a second bias voltage based on the first bias voltage. A second current path includes a resistance-based memory device, and a second voltage clamp device generates a second drive voltage based on the second bias voltage and applies the second drive voltage to the second current path.