公开(公告)号：US20210067880A1

公开(公告)日：2021-03-04

申请号：US16904560

申请日：2020-06-18

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.

Inventor： CHUN-WEN CHENG ,  CHUN YIN TSAI ,  CHIA-HUA CHU

IPC: H04R17/02 ,  B81B3/00 ,  B81C1/00

Abstract: A MEMS device and a method of manufacturing the same are provided. A semiconductor device includes a substrate and a membrane over the substrate. The membrane includes a piezoelectric material configured to generate charges in response to an acoustic wave. The membrane includes a via pattern having first lines that partition the membrane into slices such that the slices are separated from each other at a first region near an edge of the membrane and connected to each other at a second region.

公开(公告)号：US20220369041A1

公开(公告)日：2022-11-17

申请号：US17815249

申请日：2022-07-27

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.

Inventor： CHUN-WEN CHENG ,  CHUN YIN TSAI ,  CHIA-HUA CHU

IPC: H04R17/02 ,  B81B3/00 ,  B81C1/00

Abstract: A MEMS device and a method of manufacturing the same are provided. A semiconductor device includes a substrate; and a membrane over the substrate and configured to generate charges in response to an acoustic wave, the membrane being in a polygonal shape including vertices. The membrane includes a via pattern having first lines that partition the membrane into slices and extend to the vertices of the membrane such that the slices are separated from each other near an anchored region of the membrane and connected to each other around a central region. The via pattern further includes second lines extending from the anchored region of the membrane toward the central region of the membrane. Each of the second lines includes a length less than a length of each of the first lines.

公开(公告)号：US20210098681A1

公开(公告)日：2021-04-01

申请号：US16818881

申请日：2020-03-13

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.

Inventor： CHUN-WEN CHENG ,  CHUN YIN TSAI ,  CHIA-HUA CHU

IPC: H01L41/047 ,  H01L41/083 ,  H01L41/293

Abstract: A semiconductor structure is provided. The semiconductor structure includes a substrate, a first piezoelectric layer, and a first dummy layer. The first piezoelectric layer is over the substrate, and the first piezoelectric layer has a first top surface. The first dummy layer is over the first piezoelectric layer, and the first dummy layer has a second top surface. And an average roughness of the first top surface is greater than an average roughness of the second top surface. A method for manufacturing the semiconductor structure is also provided.

公开(公告)号：US20250126415A1

公开(公告)日：2025-04-17

申请号：US19002793

申请日：2024-12-27

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.

Inventor： CHUN-WEN CHENG ,  CHUN YIN TSAI ,  CHIA-HUA CHU

IPC: H04R17/02 ,  B81B3/00 ,  B81C1/00

Abstract: A semiconductor device and a method of manufacturing the same are provided. The semiconductor device includes a substrate and a membrane adjacent to the substrate and configured to generate charges in response to an acoustic wave. The membrane includes a via pattern including: first lines that partition the membrane into slices and extend to a side of the membrane such that the slices are separated from each other near the side of the membrane and connected to each other around a central region, wherein the first lines are made closer to each other when they are closer to the central region, and second lines alternatingly arranged with the first lines.

公开(公告)号：US20230370783A1

公开(公告)日：2023-11-16

申请号：US18356246

申请日：2023-07-21

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.

Inventor： CHUN-WEN CHENG ,  CHUN YIN TSAI ,  CHIA-HUA CHU

IPC: H04R17/02 ,  B81B3/00 ,  B81C1/00

CPC classification number: H04R17/02 ,  B81B3/0021 ,  B81C1/00158 ,  H04R2201/003 ,  B81B2203/0127 ,  B81B2203/04 ,  B81B2201/0257

Abstract: A MEMS device and a method of manufacturing the same are provided. A semiconductor device includes a substrate; and a membrane over the substrate and configured to generate charges in response to an acoustic wave, the membrane being in a polygonal shape including vertices. The membrane includes a via pattern includes: first lines that partition the membrane into slices and extend to the vertices of the membrane such that the slices are separated from each other near an anchored region of the membrane and connected to each other around a central region; and second lines extending from the anchored region of the membrane toward the central region of the membrane, each of the first lines or each of the second lines including non-straight lines.