Configurable retry for system operations

    公开(公告)号:US10541525B1

    公开(公告)日:2020-01-21

    申请号:US16287458

    申请日:2019-02-27

    Abstract: The present disclosure relates to configuring parameters of a system. In some examples, a timer duration circuit can be configured to output a timer duration signal defining a time duration for a retry signal based on an impedance of a first circuit coupled at a first node. A logic circuit can be configured to control an output of the retry signal to at least one integrator circuit to control a current to a second node based on one of the timer duration signal and a retry timer signal, and a combination thereof. An output circuit can be configured to output a stop retry signal based on a voltage established by a second circuit at the second node based on its impedance and the current. The stop retry signal can indicate a number of retries that have occurred and can be based on the capacitances of the first and second circuits.

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