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公开(公告)号：US20240192718A1
公开(公告)日：2024-06-13
申请号：US18419784
申请日：2024-01-23
Applicant: Texas Instruments Incorporated
Inventor： Sanjeev Praphulla Chandra Nyshadham , Subrato Roy
Abstract: In described examples, a circuit includes a first current mirror circuit. The first current mirror circuit is coupled to a power input terminal. A first stage is coupled to the first current mirror circuit, and a second stage is coupled to the first stage and to the first current mirror circuit. An amplifier is coupled to the first and second stages. The amplifier has first and second input terminals. The first input terminal is coupled to the first stage, and the second input terminal is coupled to the second stage. A second current mirror circuit is coupled to the first stage, the second stage and the amplifier.
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公开(公告)号：US11927624B2
公开(公告)日：2024-03-12
申请号：US17846397
申请日：2022-06-22
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Harsh Patel , Aalok Dyuti Saha , Sanjeev Praphulla Chandra Nyshadham , Subrato Roy , Gaurav Kumar Mittal
CPC classification number: G01R31/3008 , G01R19/2506
Abstract: One example includes a method for measuring a quiescent current in a switching voltage regulator. The method includes generating a mathematical model of a circuit design associated with the switching voltage regulator. The mathematical model includes measurable parameters to describe a switching current of a power switch of the switching voltage regulator. The method also includes fabricating a circuit comprising the switching voltage regulator based on the circuit design. The fabricated circuit includes the power switch and conductive I/O. The method also includes coupling the conductive I/O of the fabricated circuit to a circuit test fixture and providing electrical signals to the conductive I/O via the circuit test fixture. The method also includes measuring the measurable parameters in response to the electrical signals and applying the measurable parameters to the mathematical model to calculate the switching current. The method further includes calculating the quiescent current based on the switching current.
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公开(公告)号：US10312899B2
公开(公告)日：2019-06-04
申请号：US15916979
申请日：2018-03-09
Applicant: Texas Instruments Incorporated
Inventor： Subrato Roy , Dattatreya Baragur Suryanarayana
IPC: H03K17/082 , H03K17/687 , H02M3/337 , H02M3/335
Abstract: An apparatus includes an output transistor device configured to control an output voltage of an output node in response to a control signal and an input voltage. A current sensor is configured to sense an output current supplied from the output node. A feedback converter is configured to convert the sensed output current to a feedback signal that tracks the output voltage of the output node. The feedback converter is further configured to set a clamping threshold. A gate control circuit is configured to generate the control signal in response to the feedback signal. The gate control circuit is configured to clamp the output voltage of the output node via the control signal based on the clamping threshold.
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公开(公告)号：US20240219459A1
公开(公告)日：2024-07-04
申请号：US18603071
申请日：2024-03-12
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： HARSH PATEL , Aalok Dyuti Saha , Sanjeev Praphulla Chandra Nyshadham , Subrato Roy , Gaurav Kumar Mittal
CPC classification number: G01R31/3008 , G01R19/2506
Abstract: One example includes a method for measuring a quiescent current in a switching voltage regulator. The method includes generating a mathematical model of a circuit design associated with the switching voltage regulator. The mathematical model includes measurable parameters to describe a switching current of a power switch of the switching voltage regulator. The method also includes fabricating a circuit comprising the switching voltage regulator based on the circuit design. The fabricated circuit includes the power switch and conductive I/O. The method also includes coupling the conductive I/O of the fabricated circuit to a circuit test fixture and providing electrical signals to the conductive I/O via the circuit test fixture. The method also includes measuring the measurable parameters in response to the electrical signals and applying the measurable parameters to the mathematical model to calculate the switching current. The method further includes calculating the quiescent current based on the switching current.
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公开(公告)号：US20190245530A1
公开(公告)日：2019-08-08
申请号：US16386991
申请日：2019-04-17
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Subrato Roy , Dattatreya Baragur Suryanarayana
IPC: H03K17/082 , H03K17/687
CPC classification number: H03K17/0822 , H02M3/335 , H02M3/33507 , H02M3/337 , H03K17/687 , H03K2217/0027
Abstract: An apparatus includes an output transistor device configured to control an output voltage of an output node in response to a control signal and an input voltage. A current sensor is configured to sense an output current supplied from the output node. A feedback converter is configured to convert the sensed output current to a feedback signal that tracks the output voltage of the output node. The feedback converter is further configured to set a clamping threshold. A gate control circuit is configured to generate the control signal in response to the feedback signal. The gate control circuit is configured to clamp the output voltage of the output node via the control signal based on the clamping threshold.
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Patent Agency Ranking
公开(公告)号：US20180287602A1
公开(公告)日：2018-10-04
申请号：US16001518
申请日：2018-06-06
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Ankur Chauhan , Sudheer Prasad , Md. Abidur Rahman , Subrato Roy
IPC: H03K17/082 , H01L23/525 , H03K17/687 , G01R19/00
CPC classification number: H03K17/0822 , G01R19/0092 , H01L23/5256 , H03K17/687 , H03K2217/0027 , H03K2217/0054
Abstract: An apparatus includes: a first power transistor having a first current conduction path coupled between an input for receiving a supply voltage and a node and a first gate terminal coupled to a first gate control signal; a second power transistor having a second current conduction path coupled between the node and an output terminal for supplying a load current to a load; and a second gate terminal coupled to a second gate control signal; and a current sense transistor having a third gate terminal coupled to the first gate control signal, and outputting a sense current. The apparatus further includes: a differential amplifier having an output signal, and a feedback transistor having a gate terminal coupled to the output signal of the differential amplifier; and a resistor coupled between a monitor node and ground.
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7.发明授权公开(公告)号：US09496007B2
公开(公告)日：2016-11-15
申请号：US14503545
申请日：2014-10-01
Applicant: Texas Instruments Incorporated
Inventor： Sumantra Seth , Subrato Roy , Deepak Verma
Abstract: The disclosure provides a voltage regulator for generating piece-wise linear regulated supply voltage. The voltage regulator includes a first clamp circuit that receives a reference voltage and an analog supply voltage. A second clamp circuit receives the reference voltage. A voltage divider circuit is coupled to the first clamp circuit and the second clamp circuit. The voltage divider circuit receives a peripheral supply voltage and generates a regulated supply voltage.
Abstract translation: 本公开提供了用于产生分段线性稳压电源电压的电压调节器。 电压调节器包括接收参考电压和模拟电源电压的第一钳位电路。 第二钳位电路接收参考电压。 分压器电路耦合到第一钳位电路和第二钳位电路。 分压器电路接收外围电源电压并产生稳定的电源电压。
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8.发明授权公开(公告)号：US11329472B2
公开(公告)日：2022-05-10
申请号：US16428493
申请日：2019-05-31
Applicant: Texas Instruments Incorporated
Inventor： Subrato Roy , Ankur Chauhan , Vishal Gupta
Abstract: Methods, apparatus, systems and articles of manufacture are disclosed for preventing undesired triggering of short circuit or over current protection. An example apparatus includes an output terminal; a voltage detection device coupled to a voltage detection input terminal and the output terminal and including a voltage detection output coupled to a logic gate first input terminal; a pulse extender coupled between a logic gate output and a selecting node; a multiplexer coupled to the selecting node and configured to be coupled to a first protection circuit, a second protection circuit, and a driver; and a switch coupled between an input terminal and the output terminal and including a switch gate terminal coupled to the driver.
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公开(公告)号：US10422818B2
公开(公告)日：2019-09-24
申请号：US15859470
申请日：2017-12-30
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Tikno Harjono , Vijay Krishnamurthy , Min Chu , Kuntal Joardar , Gary Eugene Daum , Subrato Roy , Vinayak Hegde , Ankur Chauhan , Sathish Vallamkonda , Md Abidur Rahman , Eung Jung Kim
IPC: G01R15/14 , H01L27/06 , H03K17/567 , H01L25/18 , H01L49/02
Abstract: An electronic device comprises: a first semiconductor die; a power transistor integrated in the first semiconductor die, the power transistor comprising a gate, a first terminal, and a second terminal; a sense transistor integrated in the first semiconductor die, the sense transistor comprising a gate coupled to the gate of the power transistor, a first terminal, and a second terminal coupled to the second terminal of the power transistor; and a first resistor integrated in the first semiconductor die, the first resistor comprising a polysilicon section and a metal section coupled to the polysilicon section, the first resistor comprising a first terminal and a second terminal, wherein the first terminal of the first resistor is coupled to the first terminal of the sense transistor.
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公开(公告)号：US10014851B2
公开(公告)日：2018-07-03
申请号：US15341205
申请日：2016-11-02
Applicant: Texas Instruments Incorporated
Inventor： Ankur Chauhan , Sudheer Prasad , Md. Abidur Rahman , Subrato Roy
IPC: H03K17/00 , H03K17/082 , H03K17/687 , H01L23/525 , G01R19/00
CPC classification number: H03K17/0822 , G01R19/0092 , H01L23/5256 , H03K17/687 , H03K2217/0027 , H03K2217/0054
Abstract: An apparatus includes: a first power transistor having a first current conduction path coupled between an input for receiving a supply voltage and a node and a first gate terminal coupled to a first gate control signal; a second power transistor having a second current conduction path coupled between the node and an output terminal for supplying a load current to a load; and a second gate terminal coupled to a second gate control signal; and a current sense transistor having a third gate terminal coupled to the first gate control signal, and outputting a sense current. The apparatus further includes: a differential amplifier having an output signal, and a feedback transistor having a gate terminal coupled to the output signal of the differential amplifier; and a resistor coupled between a monitor node and ground.
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