公开(公告)号：US20230318615A1

公开(公告)日：2023-10-05

申请号：US17874750

申请日：2022-07-27

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Amit Kumar GUPTA

IPC: H03M1/46 ,  H03M1/20

CPC classification number: H03M1/462 ,  H03M1/466 ,  H03M1/20

Abstract: An ADC includes a comparator to provide a comparator output responsive to an input voltage of the ADC and a DAC output voltage; a SAR circuit including a SAR that stores an n-bit digital code that is initialized at a beginning of a conversion phase of the ADC, where the SAR circuit is to update the digital code responsive to the comparator output, where an ADC output is responsive to the digital code at an end of the conversion phase; and a DAC to provide the DAC output voltage responsive to the digital code and a reference voltage. The DAC includes an m-bit CDAC and an (n-m)-bit RDAC to provide an intermediate voltage responsive to the n-m least-significant bits of the digital code and the reference voltage. The CDAC provides the DAC output voltage responsive to the m most-significant bits of the digital code, the intermediate voltage, and reference voltage.

公开(公告)号：US20210391836A1

公开(公告)日：2021-12-16

申请号：US16903030

申请日：2020-06-16

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Amit Kumar GUPTA ,  Peng CAO

IPC: H03F3/30 ,  H03F3/45

Abstract: A precharge circuit comprises a gain amplifier, a comparator, a reservoir capacitor, a switch, a current source, and a switching network. The gain amplifier has a gain G1 and receives an input voltage Vrefp. The gain amplifier outputs an amplified voltage G1Vrefp to the comparator, which compares G1Vrefp to a voltage across the reservoir capacitor. The comparator outputs a control signal for the switch based on the comparison. The switch couples the current source to the reservoir capacitor. The current from the current source charges the reservoir capacitor. The switching network couples the reservoir capacitor to an output of the precharge circuit during a first operating mode and provides the input voltage Vrefp to the output during a second operating mode.

公开(公告)号：US20220109452A1

公开(公告)日：2022-04-07

申请号：US17061647

申请日：2020-10-02

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Amit Kumar GUPTA ,  Peng CAO

IPC: H03M3/00

Abstract: A delta-sigma modulator includes a first amplifier having an input, a feedback control input, and an output. The input is a first input of the delta-sigma modulator. The delta-sigma modulator further includes a first integrator and a first quantizer. The first integrator has an input and an output. The output of the first amplifier is coupled to the input of the first integrator. The first quantizer has an input and an output. The output of the first quantizer is coupled to the feedback control input of the first amplifier.

公开(公告)号：US20190229709A1

公开(公告)日：2019-07-25

申请号：US16046581

申请日：2018-07-26

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Amit Kumar GUPTA ,  Peng CAO

IPC: H03H19/00

Abstract: An apparatus includes a switched-capacitor filter. The switched-capacitor filter includes an integrator and a feedback loop between an output node of the integrator and an input node of the integrator, wherein the feedback loop includes a feedback capacitor, a first switch, and a second switch. The switched-capacitor filter also includes a pre-charge path between the output node of the integrator and the feedback capacitor, wherein the pre-charge path includes a pre-charge buffer and a third switch.

公开(公告)号：US20170040963A1

公开(公告)日：2017-02-09

申请号：US15229756

申请日：2016-08-05

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Amit Kumar GUPTA ,  Peng CAO

IPC: H03F3/26 ,  H03F3/21 ,  H03F3/45

CPC classification number: H03F3/211 ,  H03F3/3022 ,  H03F3/45192 ,  H03F2203/45288

Abstract: An operational amplifier includes an output stage, an input stage, a first auxiliary amplifier, and a second auxiliary amplifier. The output stage includes a first output transistor and a second output transistor. The input stage is configured to drive the output stage. The first auxiliary amplifier is coupled to an output of the input stage and to an input of the first output transistor. The first auxiliary amplifier is configured to bias the first output transistor for class AB operation and to isolate the input stage from a bias voltage applied to the first output transistor. The second auxiliary amplifier is coupled to the output of the input stage and to an input of the second output transistor. The second auxiliary amplifier is configured to bias the second output transistor for class AB operation, and to isolate the input stage from a bias voltage applied to the second output transistor.

Abstract translation: 运算放大器包括输出级，输入级，第一辅助放大器和第二辅助放大器。 输出级包括第一输出晶体管和第二输出晶体管。 输入级配置为驱动输出级。 第一辅助放大器耦合到输入级的输出端和第一输出晶体管的输入端。 第一辅助放大器被配置为偏置用于AB类操作的第一输出晶体管，并且将输入级与施加到第一输出晶体管的偏置电压隔离。 第二辅助放大器耦合到输入级的输出端和第二输出晶体管的输入端。 第二辅助放大器被配置为偏置用于AB类操作的第二输出晶体管，并且将输入级与施加到第二输出晶体管的偏置电压隔离。