Enhancement mode startup circuit with JFET emulation

    公开(公告)号:US11621708B2

    公开(公告)日:2023-04-04

    申请号:US17314523

    申请日:2021-05-07

    摘要: A startup circuit adapted to be coupled to an input voltage supply and operable to supply an output voltage at an output terminal, the startup circuit including: a first transistor having a first control terminal, a first current terminal and a second current terminal, the first current terminal adapted to be coupled to the input voltage supply and the second current terminal coupled to the output terminal; a precharge circuit having a first terminal, a second terminal and a third terminal, the second terminal adapted to be coupled to the input voltage supply and the third terminal coupled to the first control terminal; a current limiter coupled to the precharge circuit, the first control terminal and the second current terminal; a second transistor having a second control terminal, a third current terminal and a fourth current terminal, the third current terminal coupled to the precharge circuit and the second control terminal adapted to be coupled to a control signal; and a third transistor having a third control terminal, a fifth current terminal and a sixth current terminal, the fifth current terminal coupled to the first control terminal and the third control terminal is adapted to be coupled to the control signal.

    SYNCHRONOUS BOOTSTRAP HALF BRIDGE RECTIFIER

    公开(公告)号:US20230038798A1

    公开(公告)日:2023-02-09

    申请号:US17873395

    申请日:2022-07-26

    IPC分类号: H02M7/219 H02M1/08

    摘要: Described embodiments include a rectifier circuit comprising a first resistor with first and second resistor terminals, and a second resistor with third and fourth resistor terminals. The first and third resistor terminals are coupled to an auxiliary power terminal. A current source is coupled between the second resistor terminal and a ground terminal. An amplifier has a first amplifier input coupled to the second resistor terminal, and a second amplifier input coupled to the fourth resistor terminal. A first transistor is coupled between the fourth resistor terminal and a damping terminal, and has a first control terminal coupled to the first amplifier output. A gate drive circuit has an input coupled to the damping terminal. A second transistor is coupled between the damping terminal and a bootstrap supply terminal, and has a second control terminal coupled to an output of the gate drive circuit.

    ENHANCEMENT MODE STARTUP CIRCUIT WITH JFET EMULATION

    公开(公告)号:US20200274530A1

    公开(公告)日:2020-08-27

    申请号:US16731847

    申请日:2019-12-31

    摘要: A startup circuit includes an enhancement mode transistor with a drain coupled to a startup circuit input, a source coupled to a first node, and a gate coupled to a second node. The startup circuit includes a current limiting circuit that controls a current path between the second node and a startup circuit output node based on a current sense voltage signal representing a current through the enhancement mode transistor, and a voltage regulation circuit controls a voltage of the second node to regulate a startup circuit output voltage of the startup circuit output node.

    Methods and apparatus for sensing current through power semiconductor devices with reduced sensitivity to temperature and process variations

    公开(公告)号:US09742398B2

    公开(公告)日:2017-08-22

    申请号:US14994560

    申请日:2016-01-13

    IPC分类号: H03K17/687

    摘要: Current sensing through a power semiconductor device with reduced sensitivity to temperature and process variations. An example arrangement includes a power switch coupled between a voltage input and an output voltage terminal supplying current to a load; a first isolation switch coupled between the voltage input and a first node; a comparator amplifier having a pair of differential inputs coupled to the first node and a second node outputting a voltage in response to the difference at the differential inputs; and a first current source coupled between a positive supply voltage and the first node to output a first current responsive to the voltage output from the comparator amplifier; wherein the first current is proportional to the current through the power switch and a ratio of the on resistance of the power switch and the on resistance of the first isolation switch. Methods and additional arrangements are also disclosed.

    Synchronous bootstrap half bridge rectifier

    公开(公告)号:US12062995B2

    公开(公告)日:2024-08-13

    申请号:US17873395

    申请日:2022-07-26

    IPC分类号: H02M7/219 H02M1/08

    CPC分类号: H02M7/219 H02M1/08

    摘要: Described embodiments include a rectifier circuit comprising a first resistor with first and second resistor terminals, and a second resistor with third and fourth resistor terminals. The first and third resistor terminals are coupled to an auxiliary power terminal. A current source is coupled between the second resistor terminal and a ground terminal. An amplifier has a first amplifier input coupled to the second resistor terminal, and a second amplifier input coupled to the fourth resistor terminal. A first transistor is coupled between the fourth resistor terminal and a damping terminal, and has a first control terminal coupled to the first amplifier output. A gate drive circuit has an input coupled to the damping terminal. A second transistor is coupled between the damping terminal and a bootstrap supply terminal, and has a second control terminal coupled to an output of the gate drive circuit.

    Apparatus and methods to parallelize transistors

    公开(公告)号:US11264983B1

    公开(公告)日:2022-03-01

    申请号:US17087262

    申请日:2020-11-02

    摘要: Methods, apparatus, systems and articles of manufacture are described to parallelize transistors. An example apparatus includes a first transistor on a first die and a second transistor on a second die. The example apparatus includes a parallel feedback terminal coupled to the first die and the second die and a current sensor including a first contact and a second contact. The example apparatus includes a resistor coupled to the current sensor and at least one of the switched terminal or a ground terminal. The example apparatus includes an active drive controller including a first input coupled to the resistor, a second input coupled to the parallel feedback terminal, and an output coupled to the parallel feedback terminal. The example apparatus includes an edge delay controller adapted to be coupled to a gate driver and an error amplifier, and a control contact adapted to be coupled to the gate driver.

    Parallelling multiple power switches

    公开(公告)号:US11121704B2

    公开(公告)日:2021-09-14

    申请号:US15960537

    申请日:2018-04-23

    摘要: In described examples, a first power switching circuit receives a power switching control signal and activates a first power switch in response to the power switching control signal. A second power switching circuit receives the power switching control, activates a second power switch in response to the power switching control signal, and determines a first power switching delay in response to temperature indications of the first and second power switches. The second power switching circuit activates the second power switch at a first delayed time after the activation of the first power switch, where the first delayed time follows the activation of the first power switch by the determined first power switching delay.

    PARALLELLING MULTIPLE POWER SWITCHES
    9.
    发明申请

    公开(公告)号:US20190326887A1

    公开(公告)日:2019-10-24

    申请号:US15960537

    申请日:2018-04-23

    IPC分类号: H03K3/011 H03K17/14 H03K3/017

    摘要: In described examples, a first power switching circuit receives a power switching control signal and activates a first power switch in response to the power switching control signal. A second power switching circuit receives the power switching control, activates a second power switch in response to the power switching control signal, and determines a first power switching delay in response to temperature indications of the first and second power switches. The second power switching circuit activates the second power switch at a first delayed time after the activation of the first power switch, where the first delayed time follows the activation of the first power switch by the determined first power switching delay.

    Current Sensor
    10.
    发明申请
    Current Sensor 审中-公开

    公开(公告)号:US20180246144A1

    公开(公告)日:2018-08-30

    申请号:US15960588

    申请日:2018-04-24

    发明人: Cetin Kaya

    IPC分类号: G01R1/20 G01R19/00 H03F1/30

    摘要: A current sensor includes a die and a shunt resistor having a first temperature coefficient and having a first node and a second node fabricated onto the die, wherein the shunt resistor is for passing the current that is to be sensed. A first compensation resistor is fabricated onto the die and is coupled to the first node of the shunt resistor, wherein the first compensation resistor is proximate the shunt resistor and has a temperature coefficient that is similar to the temperature coefficient of the shunt resistor. A second compensation resistor is fabricated onto the die and is coupled to the second node of the shunt resistor, wherein the second compensation resistor is proximate the shunt resistor and has a temperature coefficient that is the close to the temperature coefficient of the shunt resistor.