公开(公告)号：US12174659B2

公开(公告)日：2024-12-24

申请号：US17824695

申请日：2022-05-25

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Atul Ramakant Lele ,  Dirk Preikszat ,  Gregory North ,  Robin Osa Hoel ,  Tarjei Aaberge

IPC: G06F1/10 ,  G06F1/08 ,  G06F1/12

Abstract: Aspects of the disclosure provide for an apparatus. In an example, the apparatus includes a clock switching circuit coupled to oscillators and one or more circuit units. The clock switching circuit is configured to receive, from the oscillators, a set of frequency signals, provide an uplink primary clock signal and an enable signal to the one or more circuit units, the enable signal determined synchronously with the uplink primary clock signal, receive, from the one or more circuit units or a clock management circuit, a clock frequency request, provide the uplink primary clock signal based on a first signal of the set of frequency signals, and according to the clock frequency request, determining whether to continue to provide the uplink primary clock signal based on the first signal or on a second signal of the set of frequency signals.

公开(公告)号：US10909440B2

公开(公告)日：2021-02-02

申请号：US13973636

申请日：2013-08-22

Applicant: Texas Instruments Incorporated

Inventor： Dirk Preikszat ,  Stefan Beierke ,  Norbert Asche

IPC: G06K19/077 ,  H01Q7/00 ,  H01Q23/00

Abstract: A radio frequency identification (RFID) tag. In one embodiment, an RFID tag includes an integrated circuit die. The integrated circuit die includes circuitry configured to store information and transmit the stored information responsive to reception of a radio frequency (RF) signal. The integrated circuit die also includes an antenna coupled to the circuitry. The antenna is configured to transmit and receive RFID signals. Further, the antenna and the interconnects of the circuitry are formed of a same metal, and fabricated using a same semiconductor process.

公开(公告)号：US20230025885A1

公开(公告)日：2023-01-26

申请号：US17960383

申请日：2022-10-05

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Atul Ramakant Lele ,  Dirk Preikszat ,  Sudhanshu Khanna ,  John Joseph Seibold

IPC: G06F1/08 ,  H03K5/00 ,  G06F1/12

Abstract: A clock oscillator control circuit is provided. The clock oscillator control circuit includes a signal processor configured to receive a composite clock request signal and output an altered composite clock request signal. The clock oscillator control circuit also includes logic circuitry configured to receive the altered composite clock request signal from the signal processor and a clock oscillator valid signal from a clock oscillator, and to output set and reset signals based on the altered composite clock request signal and the clock oscillator valid signal. The clock oscillator control circuit further includes a set-reset latch configured to receive the set and reset signals from the logic circuitry and to output an enable signal to the clock oscillator.

公开(公告)号：US11467622B2

公开(公告)日：2022-10-11

申请号：US17182547

申请日：2021-02-23

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Atul Ramakant Lele ,  Dirk Preikszat ,  Sudhanshu Khanna ,  John Joseph Seibold

IPC: G06F1/08 ,  H03K5/00 ,  G06F1/12

Abstract: A clock oscillator control circuit is provided. The clock oscillator control circuit includes a signal processor configured to receive a composite clock request signal and output a altered composite clock request signal. The clock oscillator control circuit also includes logic circuitry configured to receive the altered composite clock request signal from the signal processor and a clock oscillator valid signal from a clock oscillator, and to output set and reset signals based on the altered composite clock request signal and the clock oscillator valid signal. The clock oscillator control circuit further includes a set-reset latch configured to receive the set and reset signals from the logic circuitry and to output an enable signal to the clock oscillator.

公开(公告)号：US20220269304A1

公开(公告)日：2022-08-25

申请号：US17182547

申请日：2021-02-23

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Atul Ramakant Lele ,  Dirk Preikszat ,  Sudhanshu Khanna ,  John Joseph Seibold

IPC: G06F1/08 ,  G06F1/12 ,  H03K5/00

Abstract: A clock oscillator control circuit is provided. The clock oscillator control circuit includes a signal processor configured to receive a composite clock request signal and output a altered composite clock request signal. The clock oscillator control circuit also includes logic circuitry configured to receive the altered composite clock request signal from the signal processor and a clock oscillator valid signal from a clock oscillator, and to output set and reset signals based on the altered composite clock request signal and the clock oscillator valid signal. The clock oscillator control circuit further includes a set-reset latch configured to receive the set and reset signals from the logic circuitry and to output an enable signal to the clock oscillator.

公开(公告)号：US11967933B2

公开(公告)日：2024-04-23

申请号：US17849484

申请日：2022-06-24

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Gebhard Haug ,  Dirk Preikszat

IPC: H04L7/00 ,  H03D11/06 ,  H03L7/099 ,  H04L25/02

CPC classification number: H03D11/06 ,  H03L7/0992 ,  H04L7/0012 ,  H04L25/0268

Abstract: In an example, a system includes circuitry on a first side of an isolation barrier and circuitry on a second side of the isolation barrier, where the isolation barrier is operable to electrically isolate the first side from the second side. The system also includes a trimmed oscillator, a first transmitter, and a first receiver on the first side, the trimmed oscillator coupled to the first transmitter. The system includes a tunable oscillator, a second transmitter, and a second receiver on the second side, the tunable oscillator coupled to the second receiver and the second transmitter. In the system, the first side is configured to transmit a training sequence to the second side, and the second side is configured to tune the tunable oscillator based on the training sequence.

公开(公告)号：US20210117751A1

公开(公告)日：2021-04-22

申请号：US17137487

申请日：2020-12-30

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Dirk Preikszat ,  Stefan Beierke ,  Norbert Asche

IPC: G06K19/077 ,  H01Q7/00 ,  H01Q23/00

Abstract: A radio frequency identification (RFID) tag. In one embodiment, an RFID tag includes an integrated circuit die. The integrated circuit die includes circuitry configured to store information and transmit the stored information responsive to reception of a radio frequency (RF) signal. The integrated circuit die also includes an antenna coupled to the circuitry. The antenna is configured to transmit and receive RFID signals. Further, the antenna and the interconnects of the circuitry are formed of a same metal, and fabricated using a same semiconductor process.

公开(公告)号：US11860686B2

公开(公告)日：2024-01-02

申请号：US17960383

申请日：2022-10-05

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Atul Ramakant Lele ,  Dirk Preikszat ,  Sudhanshu Khanna ,  John Joseph Seibold

IPC: G06F1/08 ,  H03K5/00 ,  G06F1/12

CPC classification number: G06F1/08 ,  G06F1/12 ,  H03K5/00006 ,  H03K2005/00058

Abstract: A clock oscillator control circuit is provided. The clock oscillator control circuit includes a signal processor configured to receive a composite clock request signal and output an altered composite clock request signal. The clock oscillator control circuit also includes logic circuitry configured to receive the altered composite clock request signal from the signal processor and a clock oscillator valid signal from a clock oscillator, and to output set and reset signals based on the altered composite clock request signal and the clock oscillator valid signal. The clock oscillator control circuit further includes a set-reset latch configured to receive the set and reset signals from the logic circuitry and to output an enable signal to the clock oscillator.

公开(公告)号：US11526719B2

公开(公告)日：2022-12-13

申请号：US17137487

申请日：2020-12-30

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Dirk Preikszat ,  Stefan Beierke ,  Norbert Asche

IPC: G06K19/077 ,  H01Q7/00 ,  H01Q23/00

Abstract: A radio frequency identification (RFID) tag. In one embodiment, an RFID tag includes an integrated circuit die. The integrated circuit die includes circuitry configured to store information and transmit the stored information responsive to reception of a radio frequency (RF) signal. The integrated circuit die also includes an antenna coupled to the circuitry. The antenna is formed as a loop antenna array configured to transmit and receive RFID signals. Further, the RFID tag includes a first test pad and second test pad formed on the integrated circuit die with the first test pad coupled to a first end of the antenna by a first interconnect and a second test pad coupled to the second end of the antenna by a second interconnect.