公开(公告)号：US20230411302A1

公开(公告)日：2023-12-21

申请号：US17806954

申请日：2022-06-15

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： James Todd ,  Archana Venugopal

IPC: H01L23/552 ,  H01L27/06 ,  H01L49/02

CPC classification number: H01L23/552 ,  H01L27/0629 ,  H01L28/91

Abstract: A semiconductor device is described here. The semiconductor device includes a buried layer of a first conductivity type disposed on a semiconductor substrate. The semiconductor device includes a deep trench bypass capacitor extending into the buried layer and terminating in the buried layer. The deep trench bypass capacitor of the semiconductor device includes a first doped region, a dielectric disposed around the first doped region, and a second doped region disposed around the dielectric.

公开(公告)号：US20240112947A1

公开(公告)日：2024-04-04

申请号：US17977250

申请日：2022-10-31

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Scott Kelly Montgomery ,  James Todd ,  Yanbiao Pan ,  Jeffery Nilles

IPC: H01L21/762 ,  H01L27/06

CPC classification number: H01L21/76224 ,  H01L27/0629

Abstract: The present disclosure generally relates to shallow trench isolation (STI) processing with local oxidation of silicon (LOCOS), and an integrated circuit formed thereby. In an example, an integrated circuit includes a semiconductor layer, a LOCOS layer, an STI structure, and a passive circuit component. The semiconductor layer is over a substrate. The LOCOS layer is over the semiconductor layer. The STI structure extends into the semiconductor layer. The passive circuit component is over and touches the LOCOS layer.

公开(公告)号：US20230253495A1

公开(公告)日：2023-08-10

申请号：US17665381

申请日：2022-02-04

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Jingjing Chen ,  Ming-Yeh Chuang ,  Guruvayurappan Mathur ,  James Todd ,  Ronald Chin ,  Thomas Lillibridge

IPC: H01L29/78 ,  H01L29/423 ,  H01L29/417 ,  H01L29/66

CPC classification number: H01L29/7825 ,  H01L29/4236 ,  H01L29/41758 ,  H01L29/66515

Abstract: The present disclosure generally relates to a bird's beak profile of a field oxide region. In an example, a semiconductor device structure includes a semiconductor substrate, a dielectric oxide layer, and a field oxide region. The semiconductor substrate has a top surface. The dielectric oxide layer is over the top surface of the semiconductor substrate. The field oxide region is over the semiconductor substrate. The field oxide region is connected to the dielectric oxide layer through a bird's beak region. A lower surface of the bird's beak region interfaces with the semiconductor substrate. In a cross-section along a direction from the field oxide region to the dielectric oxide layer, the lower surface of the bird's beak region does not have a slope with a magnitude that exceeds 0.57735, where rise of the slope is in a direction normal to the top surface of the semiconductor substrate.