Circuit design validation tool for radiation-hardened design

    公开(公告)号:US12236177B2

    公开(公告)日:2025-02-25

    申请号:US17586516

    申请日:2022-01-27

    Abstract: One example includes a method for validating a circuit design. The method includes providing a set of coded rules. Each of the coded rules can define conditions for circuit cells to qualify the circuit design as being radiation-hardened. The method also includes accessing a circuit design netlist associated with the circuit design from a circuit design database. The method also includes evaluating each of the circuit cells in the circuit design netlist with respect to each of the coded rules. The method further includes providing a circuit evaluation report comprising an indication of failure of a set of the circuit cells with respect to one or more of the coded rules in response to the evaluation.

    Multiple chip synchronization via single pin monitoring of an external timing capacitor

    公开(公告)号:US10651844B2

    公开(公告)日:2020-05-12

    申请号:US16190871

    申请日:2018-11-14

    Abstract: An IC chip, a system and a method of operating the IC chip in response to an event trigger are provided. The method includes responsive to the event trigger, coupling a pin to a source of constant current to charge an external capacitor coupled to the pin and monitoring a capacitor voltage on the pin. If the magnitude of the capacitor voltage is greater than a rising threshold, detection of a falling threshold is enabled. If the magnitude of the capacitor voltage is greater than a voltage threshold, a first response is triggered and the pin is coupled to the lower rail to discharge the external capacitor. If detection of the falling threshold is enabled and the magnitude of the capacitor voltage is less than the falling threshold, the first response is also triggered.

    MULTIPLE CHIP SYNCHRONIZATION VIA SINGLE PIN MONITORING OF AN EXTERNAL TIMING CAPACITOR

    公开(公告)号:US20190386657A1

    公开(公告)日:2019-12-19

    申请号:US16190871

    申请日:2018-11-14

    Abstract: An IC chip, a system and a method of operating the IC chip in response to an event trigger are provided. The method includes responsive to the event trigger, coupling a pin to a source of constant current to charge an external capacitor coupled to the pin and monitoring a capacitor voltage on the pin. If the magnitude of the capacitor voltage is greater than a rising threshold, detection of a falling threshold is enabled. If the magnitude of the capacitor voltage is greater than a voltage threshold, a first response is triggered and the pin is coupled to the lower rail to discharge the external capacitor. If detection of the falling threshold is enabled and the magnitude of the capacitor voltage is less than the falling threshold, the first response is also triggered.

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