COMMUNICATION CIRCUIT WITH ANALOG DUTY-CYCLE DETECTION

    公开(公告)号:US20240322799A1

    公开(公告)日:2024-09-26

    申请号:US18240796

    申请日:2023-08-31

    CPC classification number: H03K3/017 H03K3/037 H03K17/56

    Abstract: An analog duty-cycle detector includes: off-time detection circuitry; on-time detection circuitry; compare circuitry; and a controller. The off-time detection circuitry includes a first transistor and a first capacitor. The on-time detection circuitry includes a second transistor and a second capacitor. The compare circuitry has a first terminal, a second terminal, and a third terminal. The first terminal of the compare circuitry is coupled to a first terminal of the first capacitor. The second terminal of the compare circuitry is coupled to a first terminal of the second capacitor. The controller has a first terminal and a second terminal. The first terminal of the controller coupled to a control terminal of the first transistor. The second terminal of the controller coupled to the control terminal of the second transistor.

    OVERSHOOT CURRENT DETECTION AND CORRECTION CIRCUIT FOR ELECTRICAL FAST TRANSIENT EVENTS

    公开(公告)号:US20200303920A1

    公开(公告)日:2020-09-24

    申请号:US16411251

    申请日:2019-05-14

    Abstract: A positive overshoot detection circuit comprises a transistor coupled to a current mirror, a reference current source coupled to the current mirror, and a comparator coupled to the reference current source and the current mirror. The comparator output indicates whether the current mirror's current is greater than the reference current source's current. A control input and a current terminal of the transistor are coupled to a clamping circuit. A negative overshoot detection circuit comprises a biasing sub-circuit coupled to a transistor, a resistor coupled to the transistor, and a comparator coupled to the transistor and the resistor. The comparator output indicates whether the transistor is in an on or off state. The biasing sub-circuit is coupled to a clamping circuit. In some implementations, the comparator outputs from the positive and negative overshoot detection circuits are provided to a driver circuit, which modifies its operation.

    OVERSHOOT CURRENT DETECTION AND CORRECTION CIRCUIT FOR ELECTRICAL FAST TRANSIENT EVENTS

    公开(公告)号:US20240097437A1

    公开(公告)日:2024-03-21

    申请号:US18522644

    申请日:2023-11-29

    Abstract: A positive overshoot detection circuit comprises a transistor coupled to a current mirror, a reference current source coupled to the current mirror, and a comparator coupled to the reference current source and the current mirror. The comparator output indicates whether the current mirror's current is greater than the reference current source's current. A control input and a current terminal of the transistor are coupled to a clamping circuit. A negative overshoot detection circuit comprises a biasing sub-circuit coupled to a transistor, a resistor coupled to the transistor, and a comparator coupled to the transistor and the resistor. The comparator output indicates whether the transistor is in an on or off state. The biasing sub-circuit is coupled to a clamping circuit. In some implementations, the comparator outputs from the positive and negative overshoot detection circuits are provided to a driver circuit, which modifies its operation.

    INTEGRATED CIRCUIT RESISTOR WITH PASSIVE BREAKDOWN PROTECTION CIRCUIT

    公开(公告)号:US20200312946A1

    公开(公告)日:2020-10-01

    申请号:US16692349

    申请日:2019-11-22

    Abstract: An electrical device includes an integrated circuit having device circuitry, a passive breakdown protection circuit, and a resistor coupled to or included with the device circuitry. The resistor includes: a polysilicon layer coupled between a first terminal and a second terminal; an epitaxial layer terminal; and a buried layer terminal. The passive breakdown protection circuit is coupled between the second terminal and the epitaxial layer terminal. The passive breakdown protection circuit is also coupled between the epitaxial layer terminal and the buried layer terminal.

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