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公开(公告)号:US20240037700A1
公开(公告)日:2024-02-01
申请号:US18379249
申请日:2023-10-12
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor: Mahesh M. Mehendale , Ajit Deepak Gupte
IPC: G06T3/40 , H04N19/523 , G06T7/238 , H04N19/43
CPC classification number: G06T3/4007 , H04N19/523 , G06T7/238 , H04N19/43 , G06T2207/10016 , G06T2207/20021
Abstract: The architecture shown can perform global search, local search and local sub pixel search in a parallel or in a pipelined mode. All operations are in a streaming mode without the requirement of external intermediate data storage.
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公开(公告)号:US20130279587A1
公开(公告)日:2013-10-24
申请号:US13859994
申请日:2013-04-10
Applicant: Texas Instruments Incorporated
Inventor: Ajit Deepak Gupte , Mahesh M. Mehendale , Hetul Sanghvi , Ajit Venkat Rao
IPC: H04N7/34
CPC classification number: H04N19/00763 , H04N19/428 , H04N19/433 , H04N19/593 , H04N19/61
Abstract: A method, system and apparatus of lossy compression technique for video encoder bandwidth reduction using compression error data are disclosed. In one embodiment, a method includes storing an error data from a compression of an original reference data in an off-chip memory, accessing the error data during a motion compensation operation, and performing the motion compensation operation by applying the error data through an algorithm (e.g., determined by the method of storing the error data). The method may include generating a predicted frame in the motion compensation operation using a motion vector and an on-chip video data. In addition, the method may include determining the error data as a difference between a compressed reference data (e.g., is created by compressing the original reference data) and an original reference data (e.g., reconstructed from a prior predicted frame and a decompressed encoder data).
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公开(公告)号:US11320478B2
公开(公告)日:2022-05-03
申请号:US16901966
申请日:2020-06-15
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor: Rubin Ajit Parekhji , Mahesh M. Mehendale , Vinod Menezes , Vipul K. Singhal
IPC: G01R33/00 , G01R31/28 , G01R31/3185 , G01R1/04 , G01R1/067
Abstract: In a method of testing a semiconductor wafer, a probe tip contacts a pad in a scribe line space between facing sides of first and second dies. The probe tip is electrically coupled to an automated test equipment (ATE). The second die is spaced apart from the first die. The scribe line space includes an interconnect extending along at least an entire length of the facing sides of the first and second dies. The pad is electrically coupled through the interconnect to at least one of the first or second dies. With the ATE, circuitry is tested in at least one of the first or second dies. The pad is electrically coupled through the interconnect to the circuitry.
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公开(公告)号:US20210383504A1
公开(公告)日:2021-12-09
申请号:US17411844
申请日:2021-08-25
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor: Mahesh M. Mehendale , Ajit Deepak Gupte
IPC: G06T3/40 , H04N19/523 , G06T7/238 , H04N19/43
Abstract: The architecture shown can perform global search, local search and local sub pixel search in a parallel or in a pipelined mode. All operations are in a streaming mode without the requirement of external intermediate data storage.
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公开(公告)号:US10684322B2
公开(公告)日:2020-06-16
申请号:US16247271
申请日:2019-01-14
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor: Rubin Ajit Parekhji , Mahesh M. Mehendale , Vinod Menezes , Vipul K. Singhal
IPC: G01R31/26 , G01R31/28 , G01R31/3185 , G01R1/04 , G01R1/067
Abstract: In a method of testing a semiconductor wafer including a scribe line and multiple dies, the method includes implementing a first landing pad on the scribe line, and implementing a first interconnect on the scribe line and between the first landing pad and a first cluster of the dies, thereby coupling the first landing pad to the first cluster of dies. The method also includes performing the testing of the first cluster of dies using automated test equipment (ATE) coupled to a probe tip by contacting the first landing pad with the probe tip, and applying an ATE resource to the first cluster of dies.
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公开(公告)号:US20190154755A1
公开(公告)日:2019-05-23
申请号:US16247271
申请日:2019-01-14
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor: Rubin Ajit Parekhji , Mahesh M. Mehendale , Vinod Menezes , Vipul K. Singhal
IPC: G01R31/28 , G01R1/04 , G01R1/067 , G01R31/3185
Abstract: In a method of testing a semiconductor wafer including a scribe line and multiple dies, the method includes implementing a first landing pad on the scribe line, and implementing a first interconnect on the scribe line and between the first landing pad and a first cluster of the dies, thereby coupling the first landing pad to the first cluster of dies. The method also includes performing the testing of the first cluster of dies using automated test equipment (ATE) coupled to a probe tip by contacting the first landing pad with the probe tip, and applying an ATE resource to the first cluster of dies.
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公开(公告)号:US10180454B2
公开(公告)日:2019-01-15
申请号:US15130429
申请日:2016-04-15
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor: Rubin Ajit Parekhji , Mahesh M. Mehendale , Vinod Menezes , Vipul K. Singhal
IPC: G01R31/26 , G01R31/28 , G01R1/067 , G01R31/3185 , G01R1/04
Abstract: A method of testing a semiconductor wafer comprising a scribe line and a plurality of dies. The method includes implementing a first landing pad on the scribe line and implementing a first interconnect on the scribe line and between the first landing pad and a first cluster of the plurality of dies, thereby coupling the first landing pad to the first cluster of dies. The method also includes performing the testing of the first cluster of dies using automated test equipment (ATE) coupled to a probe tip by contacting the first landing pad with the probe tip and applying an ATE resource to the first cluster of dies.
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公开(公告)号:US11790485B2
公开(公告)日:2023-10-17
申请号:US17411844
申请日:2021-08-25
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor: Mahesh M. Mehendale , Ajit Deepak Gupte
IPC: H04N19/43 , G06T3/40 , H04N19/523 , G06T7/238
CPC classification number: G06T3/4007 , G06T7/238 , H04N19/43 , H04N19/523 , G06T2207/10016 , G06T2207/20021
Abstract: The architecture shown can perform global search, local search and local sub pixel search in a parallel or in a pipelined mode. All operations are in a streaming mode without the requirement of external intermediate data storage.
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公开(公告)号:US11127114B2
公开(公告)日:2021-09-21
申请号:US16809052
申请日:2020-03-04
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor: Mahesh M. Mehendale , Ajit Deepak Gupte
IPC: G06T3/40 , H04N19/43 , H04N19/523 , G06T7/238
Abstract: The architecture shown can perform global search, local search and local sub pixel search in a parallel or in a pipelined mode. All operations are in a streaming mode without the requirement of external intermediate data storage.
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公开(公告)号:US20200379031A1
公开(公告)日:2020-12-03
申请号:US16901966
申请日:2020-06-15
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor: Rubin Ajit Parekhji , Mahesh M. Mehendale , Vinod Menezes , Vipul K. Singhal
IPC: G01R31/28 , G01R31/3185 , G01R1/04 , G01R1/067
Abstract: In a method of testing a semiconductor wafer, a probe tip contacts a pad in a scribe line space between facing sides of first and second dies. The probe tip is electrically coupled to an automated test equipment (ATE). The second die is spaced apart from the first die. The scribe line space includes an interconnect extending along at least an entire length of the facing sides of the first and second dies. The pad is electrically coupled through the interconnect to at least one of the first or second dies. With the ATE, circuitry is tested in at least one of the first or second dies. The pad is electrically coupled through the interconnect to the circuitry.
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