公开(公告)号：US10560064B2

公开(公告)日：2020-02-11

申请号：US16555206

申请日：2019-08-29

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Steven G. Brantley ,  Bharath Karthik Vasan ,  Srinivas K. Pulijala ,  Martijn Snoeij

IPC: H03F3/45 ,  H03F3/68 ,  H03F1/02 ,  H03F1/08

Abstract: In examples, a system comprises a differential amplifier coupled to a parasitic capacitor positioned between a first node and a first reference voltage source. The system comprises a buffer amplifier having an input terminal and an output terminal, the input terminal coupled to the first node and the output terminal coupled to a cancellation capacitor. The system includes a controlled current source coupled to the first node and the input terminal, the controlled current source coupled to a second reference voltage source. The system comprises a current sense circuit coupled to the cancellation capacitor and the second reference voltage source.

公开(公告)号：US20230342564A1

公开(公告)日：2023-10-26

申请号：US17729210

申请日：2022-04-26

Applicant: Texas Instruments Incorporated

Inventor： Martijn Snoeij ,  Viola Schaffer

IPC: G06G7/24

CPC classification number: G06G7/24

Abstract: A logarithmic converter circuit includes a converter input and a converter output. The circuit includes a first transistor which includes a control terminal, a first terminal coupled to the converter input, and a second terminal coupled to the converter output. The circuit includes a first operational amplifier which includes a first input coupled to the converter input, a second input coupled to a common potential, and an output coupled to the second terminal. The circuit includes a first capacitor coupled between the first terminal and the control terminal and includes a first resistor coupled between the control terminal and the common potential.

公开(公告)号：US10461706B1

公开(公告)日：2019-10-29

申请号：US15966946

申请日：2018-04-30

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Steven G. Brantley ,  Bharath Karthik Vasan ,  Srinivas K. Pulijala ,  Martijn Snoeij

IPC: H03F3/45 ,  H03F3/68 ,  H03F1/02 ,  H03F1/08

Abstract: In examples, a system comprises a differential amplifier coupled to a parasitic capacitor positioned between a first node and a first reference voltage source. The system comprises a buffer amplifier having an input terminal and an output terminal, the input terminal coupled to the first node and the output terminal coupled to a cancellation capacitor. The system includes a controlled current source coupled to the first node and the input terminal, the controlled current source coupled to a second reference voltage source. The system comprises a current sense circuit coupled to the cancellation capacitor and the second reference voltage source.