Control of input bias current modulation in amplifiers

    公开(公告)号:US11722104B2

    公开(公告)日:2023-08-08

    申请号:US17462868

    申请日:2021-08-31

    CPC classification number: H03F3/04

    Abstract: Examples of amplifiers use current-replication transistors and a separation circuit coupled to such transistors to separate error current components from other current components in a pre-driver of an amplifier. In response to driving the current-replication transistors with the separated error current components, replica base current components that approximate error-modulation components of the pre-driver base currents are generated. Replica-current subtraction circuitry coupled to the current-replication transistors then subtract the replica base current components from the pre-driver base currents, affecting cancellation of the error-modulation components of the pre-driver base currents.

    DYNAMIC CONTROL OF FRONT-END STAGE TRANSCONDUCTANCE IN BIPOLAR AMPLIFIERS

    公开(公告)号:US20240178800A1

    公开(公告)日:2024-05-30

    申请号:US18070985

    申请日:2022-11-29

    CPC classification number: H03F3/04

    Abstract: Examples of circuits, amplifiers and stages thereof include a front-end including an input section having a voltage input and a current output; a current generating section operably coupled to the input section and which produces one or more bias currents to generate a tail current that biases the input section. A signal node, which may be the output terminal of the stage, is operably coupled to the input section. Transconductance choke circuitry is coupled to the signal node and to the current generating section. The transconductance choke circuitry is configured to reduce transconductance of the front-end when the signal at the signal node exceeds an upper threshold or drops below a lower threshold.

    CONTROL OF INPUT BIAS CURRENT MODULATION IN AMPLIFIERS

    公开(公告)号:US20230060318A1

    公开(公告)日:2023-03-02

    申请号:US17462868

    申请日:2021-08-31

    Abstract: Examples of amplifiers use current-replication transistors and a separation circuit coupled to such transistors to separate error current components from other current components in a pre-driver of an amplifier. In response to driving the current-replication transistors with the separated error current components, replica base current components that approximate error-modulation components of the pre-driver base currents are generated. Replica-current subtraction circuitry coupled to the current-replication transistors then subtract the replica base current components from the pre-driver base currents, affecting cancellation of the error-modulation components of the pre-driver base currents.

    AMPLIFIER WITH PRE-DRIVER HAVING CROSS-COUPLED TRANSISTORS

    公开(公告)号:US20250105809A1

    公开(公告)日:2025-03-27

    申请号:US18428170

    申请日:2024-01-31

    Abstract: An amplifier includes first through sixth transistors. The first transistor is of a first polarity type and has a control terminal and first and second terminals. The second transistor is of a second polarity type and has a control terminal and first and second terminals. The third transistor is of the first polarity type and has a control terminal and first and second terminals. The second terminal of the third transistor is coupled to the first terminal of the second transistor. The fourth transistor is of the second polarity type and has a control terminal and first and second terminals. The first terminal of the fourth transistor is coupled to the second terminal of the second transistor. The fifth transistor has a control terminal coupled to the control terminal of the third transistor. A sixth transistor has a control terminal coupled to the control terminal of the fourth transistor.

    METHODS AND APPARATUS TO IMPROVE AN OUTPUT OF AN AMPLIFIER

    公开(公告)号:US20250105800A1

    公开(公告)日:2025-03-27

    申请号:US18759086

    申请日:2024-06-28

    Abstract: An example apparatus includes: first buffer circuitry having a first terminal and a second terminal; second buffer circuitry having a first terminal and a second terminal; third buffer circuitry having a first terminal and a second terminal, the first terminal of the third buffer circuitry coupled to the first terminal of the second buffer circuitry; a first transistor having a first terminal, a second terminal and a control terminal, the first terminal of the first transistor coupled to the first terminal of the first buffer circuitry, the control terminal of the first transistor coupled to the second terminal of the second buffer circuitry; a second transistor having a first terminal and a second terminal, the first terminal of the second transistor coupled to the second terminal of the first buffer circuitry.

    FREQUENCY COMPENSATION IN AMPLIFIERS WITH LOCAL-FEEDBACK BUFFER STAGES

    公开(公告)号:US20240186951A1

    公开(公告)日:2024-06-06

    申请号:US18070940

    申请日:2022-11-29

    CPC classification number: H03F1/0205 H03F1/32 H03F3/04

    Abstract: Examples of circuits, amplifiers, and stages thereof are provided that improve amplifier stability margins while maintaining signal fidelity. Example structures include pre-driver circuitry; a compensation node exhibiting high impedance during operation; a feedforward driver coupled to the pre-driver circuitry; and first and second signal mirrors; and first and second output drivers, each having a control terminal. Example structures further include feedforward circuitry in which a first node thereof is coupled to the output of the feedforward driver, a second node thereof is coupled to the control terminal of the first output driver, and a third node thereof is coupled to the control terminal of the second output driver; and compensation circuitry in which a first node thereof is coupled to the compensation node, a second node thereof is coupled to a first internal node of the first signal mirror, and a third node thereof is coupled to a second internal node of the second signal mirror.

    CONTROL OF BASE CURRENTS FOR OUTPUT DRIVER TRANSISTORS IN AMPLIFIERS

    公开(公告)号:US20230069204A1

    公开(公告)日:2023-03-02

    申请号:US17462930

    申请日:2021-08-31

    Abstract: Examples of amplifiers accurately generate control currents for control terminals of output drivers using current-replication transistors and current mirrors. An input terminal of a first current mirror is coupled to the control terminal of a first current-replication transistor, and an input terminal of a second current mirror is coupled to the control terminal of a second current-replication transistor. The output terminals of the first and second current mirrors are coupled to the control terminals of first and second output drivers, respectively. First and second intermediate currents indicative of first and second currents flowing to the first and second output driver elements, respectively, are generated. Using the first and second current mirrors, first and second control currents are generated to control the first and second output driver elements, respectively, by scaling the first and second intermediate currents according to the gain factors of the current mirrors.

    REDUCTION OF NOISE AND WEAK AVALANCHE CURRENT INDUCED ERRORS IN BIPOLAR AMPLIFIERS

    公开(公告)号:US20240146268A1

    公开(公告)日:2024-05-02

    申请号:US17977435

    申请日:2022-10-31

    CPC classification number: H03F3/456 H03F3/45174 H03F2200/372

    Abstract: Examples of circuits and amplifiers include recirculation circuitry to reduce or cancel error currents produced by target bipolar junction transistors (BJTs). In an example, first recirculation circuitry is coupled to the base of a first signal-conveyance BJT and to one of the collector or the emitter of the first signal-conveyance BJT; second recirculation circuitry is coupled to the base of a second signal-conveyance BJT and to one of the collector or the emitter of the second signal-conveyance BJT; and biasing circuitry is coupled to the first and second recirculation circuitry. The recirculation circuitry may be implemented with BJTs or MOSFETs. Configurations are provided in which error current(s) are recirculated between the base and collector/emitter node of each target BJT.

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