Abstract:
A voltage-to-current converter includes a first differential pair of transistors, a second differential pair of transistors, and a first resistor. The first differential pair of transistors includes a first transistor and a second transistor. An emitter of the first transistor is directly connected to an emitter of the second transistor. The second differential pair of transistors includes a third transistor and a fourth transistor. An emitter of the third transistor is directly connected to an emitter of the fourth transistor. The first resistor is connected to the emitter of the first transistor, the emitter of the second transistor, the emitter of the third transistor, and the emitter of the fourth transistor.
Abstract:
One example includes an amplifier system. The system includes a precision amplifier portion comprising a first input stage configured to receive an input voltage and a first output stage configured to generate an output voltage at the first output stage based on the input voltage. The system also includes a slew amplifier portion arranged in parallel with the precision amplifier portion and comprising a second input stage that receives the input voltage and a second output stage. The slew amplifier portion can be activated in response to a detected slew condition associated with the input voltage to generate the output voltage based on the input voltage.
Abstract:
In examples, a system comprises a differential amplifier coupled to a parasitic capacitor positioned between a first node and a first reference voltage source. The system comprises a buffer amplifier having an input terminal and an output terminal, the input terminal coupled to the first node and the output terminal coupled to a cancellation capacitor. The system includes a controlled current source coupled to the first node and the input terminal, the controlled current source coupled to a second reference voltage source. The system comprises a current sense circuit coupled to the cancellation capacitor and the second reference voltage source.
Abstract:
A circuit and method for an audio op-amp that is configured to minimize crossover distortion between push and pull components of the audio op-amp. The audio op-amp includes an input stage that receives differential input signals and generates an output that amplifies the difference between the input signals. The audio op-amp further includes an output stage that receive the amplified signal and generate an audio output signal for playback by a speaker system. The output stage includes a diamond driver circuit that buffers the input stage from the speaker system, a boost circuit that includes a pair of boosting transistors that amplify the current of the amplified signal, and a biasing circuit that provides bias currents to the transistors of the boost circuit in a manner that minimizes crossover distortion between the boosting transistors.
Abstract:
An amplifier includes an amplifier input and an amplifier output. A compensation network is coupled to the amplifier output. The compensation network includes at least one RC network tuned to a frequency in which the amplifier operates. The compensation network provides at least one zero to compensate for at least one pole introduced by a load coupled to the amplifier output.
Abstract:
A circuit and method for an audio op-amp that is configured to minimize crossover distortion between push and pull components of the audio op-amp. The audio op-amp includes an input stage that receives differential input signals and generates an output that amplifies the difference between the input signals. The audio op-amp further includes an output stage that receive the amplified signal and generate an audio output signal for playback by a speaker system. The output stage includes a diamond driver circuit that buffers the input stage from the speaker system, a boost circuit that includes a pair of boosting transistors that amplify the current of the amplified signal, and a biasing circuit that provides bias currents to the transistors of the boost circuit in a manner that minimizes crossover distortion between the boosting transistors.
Abstract:
An amplifier includes an amplifier input and an amplifier output. A compensation network is coupled to the amplifier output. The compensation network includes at least one RC network tuned to a frequency in which the amplifier operates. The compensation network provides at least one zero to compensate for at least one pole introduced by a load coupled to the amplifier output.
Abstract:
An amplifier includes an amplifier input and an amplifier output. A compensation network is coupled to the amplifier output. The compensation network includes at least one RC network tuned to a frequency in which the amplifier operates. The compensation network provides at least one zero to compensate for at least one pole introduced by a load coupled to the amplifier output.
Abstract:
One example includes an amplifier system. The system includes a precision amplifier portion comprising a first input stage configured to receive an input voltage and a first output stage configured to generate an output voltage at the first output stage based on the input voltage. The system also includes a slew amplifier portion arranged in parallel with the precision amplifier portion and comprising a second input stage that receives the input voltage and a second output stage. The slew amplifier portion can be activated in response to a detected slew condition associated with the input voltage to generate the output voltage based on the input voltage.
Abstract:
An operational amplifier (10) capable of driving a capacitive load (CLOAD) and/or a resistive load (RLOAD) includes a first gain stage (2) having an output coupled to a high impedance node (3) and a second gain stage (5) having an input coupled to the first high impedance node. A gain reduction resistor (RD) and an AC coupling capacitor (CD) are coupled in series between the high impedance node and a reference voltage. A Miller feedback capacitor (CM) is coupled between an output conductor (7) of the second gain stage and the high impedance node. The output of the second gain stage may be coupled to the high impedance node by a cascode transistor (MCASCODE).