公开(公告)号：US10044271B1

公开(公告)日：2018-08-07

申请号：US15581747

申请日：2017-04-28

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Rida Shawky Assaad ,  David Wayne Evans

IPC: H02M1/36 ,  H02M3/158 ,  H03K4/06 ,  H03K5/00

Abstract: Methods and apparatus for DC-DC soft start are disclosed herein, an example DC-DC voltage converter includes at least two transistors to at least charge or discharge an inductor from an input source and to ground respectively, the inductor to output an output voltage. A synchronize and track circuit generates a bias current based on a reference voltage. An amplifier generates an error current based on an output voltage and the reference voltage. An oscillator oscillates at a switching frequency based on the bias current and the error current. A multiplexer selects between (1) a first input signal generated based on the switching frequency, and (2) a second input signal generated based on the switching frequency and the error current, for output as a reset signal. A latch provides a control signal to the at least two transistors based on the reset signal and the switching frequency.

公开(公告)号：US10802517B1

公开(公告)日：2020-10-13

申请号：US16455056

申请日：2019-06-27

Applicant: Texas Instruments Incorporated

Inventor： Rida Shawky Assaad ,  Angelo William Pereira ,  Terry Lee Mayhugh, Jr.

IPC: G05F1/46 ,  G05F1/56

Abstract: A voltage regulator circuit includes a bias circuit having an input and an output. The input of the bias circuit is coupled to an input voltage supply rail. A Zener diode has a cathode coupled to the output of the bias circuit. A resistor network is coupled to the output of the bias circuit. The resistor network includes a first circuit path, which includes a first resistor, connected in parallel with the Zener diode and a second circuit path, which includes a second resistor, coupled between the output of the bias circuit and a node. A current control circuit is coupled to the bias circuit and the resistor network. An output stage has an input and an output. The input of the output stage is coupled to the node.

公开(公告)号：US10916653B2

公开(公告)日：2021-02-09

申请号：US16160470

申请日：2018-10-15

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Rida Shawky Assaad ,  Angelo William Pereira

IPC: H01L29/78 ,  H03K19/0185

Abstract: In a described example, an apparatus includes at least one latch coupled to a first positive supply voltage and to a first negative supply voltage, the latch having a first inverter and a second inverter coupled to one another back to back, to output a first voltage corresponding to a first latch state and a second voltage corresponding to a second latch state responsive to a first set signal and a first reset signal. An isolation circuit is coupled to a second positive supply voltage and to a second negative supply voltage and is coupled to receive a second set signal, and a second reset signal. The second positive supply voltage is independent of the first positive supply voltage. The isolation circuit outputs the first set signal and the first reset signal and includes less than two pairs of drain extended metal oxide semiconductor (DEMOS) transistors.

公开(公告)号：US20190207026A1

公开(公告)日：2019-07-04

申请号：US16160470

申请日：2018-10-15

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Rida Shawky Assaad ,  Angelo William Pereira

IPC: H01L29/78 ,  H03K19/0185

CPC classification number: H01L29/7835 ,  H03K19/018507

Abstract: In a described example, an apparatus includes at least one latch coupled to a first positive supply voltage and to a first negative supply voltage, the latch having a first inverter and a second inverter coupled to one another back to back, to output a first voltage corresponding to a first latch state and a second voltage corresponding to a second latch state responsive to a first set signal and a first reset signal. An isolation circuit is coupled to a second positive supply voltage and to a second negative supply voltage and is coupled to receive a second set signal, and a second reset signal. The second positive supply voltage is independent of the first positive supply voltage. The isolation circuit outputs the first set signal and the first reset signal and includes less than two pairs of drain extended metal oxide semiconductor (DEMOS) transistors.

公开(公告)号：US10014775B1

公开(公告)日：2018-07-03

申请号：US15390911

申请日：2016-12-27

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Rida Shawky Assaad ,  Angelo William Pereira

IPC: H02M3/158 ,  H02M3/07

Abstract: Methods and apparatus for bootstrap capacitor sharing in multilevel DC-DC converters are disclosed. In one example, a bootstrap capacitor voltage of the bootstrap capacitor can be alternately shared between respective control gates of a first high side primary switch and a central high side primary switch of the multilevel DC-DC converter at different times during a duty cycle of the multilevel DC-DC converter. In another example, the bootstrap capacitor voltage can be transferred to drive respective control gates of the first and central high side primary switches and can ensure full gate drive of the first and central high side primary switches to avoid channel resistance degradation thereof, even when the multilevel DC-DC converter is operated in a substantially full duty cycle mode.

公开(公告)号：US10103261B1

公开(公告)日：2018-10-16

申请号：US15857214

申请日：2017-12-28

Applicant: Texas Instruments Incorporated

Inventor： Rida Shawky Assaad ,  Angelo William Pereira

IPC: H01L29/78 ,  H03K19/0185

Abstract: In a described example, an apparatus includes at least one latch coupled to a first positive supply voltage and to a first negative supply voltage, the latch having a first inverter and a second inverter coupled to one another back to back, to output a first voltage corresponding to a first latch state and a second voltage corresponding to a second latch state responsive to a first set signal and a first reset signal. An isolation circuit is coupled to a second positive supply voltage and to a second negative supply voltage and is coupled to receive a second set signal, and a second reset signal, the second positive supply voltage being floating with respect to the first positive supply voltage. The isolation circuit outputs the first set signal and the first reset signal and includes less than two pairs of drain extended metal oxide semiconductor (DEMOS) transistors.

公开(公告)号：US20180183330A1

公开(公告)日：2018-06-28

申请号：US15390911

申请日：2016-12-27

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Rida Shawky Assaad ,  Angelo William Pereira

IPC: H02M3/158

CPC classification number: H02M3/158 ,  H02M1/08

Abstract: Methods and apparatus for bootstrap capacitor sharing in multilevel DC-DC converters are disclosed. In one example, a bootstrap capacitor voltage of the bootstrap capacitor can be alternately shared between respective control gates of a first high side primary switch and a central high side primary switch of the multilevel DC-DC converter at different times during a duty cycle of the multilevel DC-DC converter. In another example, the bootstrap capacitor voltage can be transferred to drive respective control gates of the first and central high side primary switches and can ensure full gate drive of the first and central high side primary switches to avoid channel resistance degradation thereof, even when the multilevel DC-DC converter is operated in a substantially full duty cycle mode.

公开(公告)号：US09866113B1

公开(公告)日：2018-01-09

申请号：US15379746

申请日：2016-12-15

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Rida Shawky Assaad ,  David Wayne Evans

IPC: H02M3/07 ,  H02M1/00

CPC classification number: H02M3/07 ,  H02M3/158 ,  H02M2001/0009 ,  H02M2003/078

Abstract: Methods and apparatus for flying capacitor balancing in multilevel converters are disclosed. Example flying capacitor balancing circuitry can include voltage difference sense and control circuitry and duty cycle timing adjustment circuitry. The voltage difference sense and control circuitry can generate a compensation control signal for the duty cycle timing adjustment circuitry.

公开(公告)号：US09866099B1

公开(公告)日：2018-01-09

申请号：US15395165

申请日：2016-12-30

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Rida Shawky Assaad ,  Ming Sun ,  Jeffrey Morroni

IPC: H02M1/08 ,  H02M1/00 ,  H02M3/158 ,  H02M1/088

CPC classification number: H02M1/00 ,  H02M1/08 ,  H02M1/088 ,  H02M3/158 ,  H02M3/1588 ,  H02M2001/0003 ,  H02M2001/0029 ,  H02M2001/0048 ,  H03K17/167

Abstract: A power converter includes a high side device, a low side device connected to the high side device at a switch node, an inductor connected to the high side device and the low side device at the switch node, and a high side driver. The high side driver is configured to drive a gate of the high side device at a first current for a first period of time. In response to the first period of time ending, the high side driver is configured to step down the first current for a second period of time. In response to the second period of time ending, the high side driver is configured to drive the gate of the high side device at the first current.