Pass gate driver
    2.
    发明授权

    公开(公告)号:US11901803B2

    公开(公告)日:2024-02-13

    申请号:US17560756

    申请日:2021-12-23

    CPC classification number: H02M1/08 G05F1/46 H02M1/0029 H02M3/157 H02M3/1584

    Abstract: A driver includes a low-resistance charging path between a supply voltage rail and a first output node, a high-resistance charging path between the supply voltage rail and the first output node, an inverter coupled to the first output node and configured to enable and disable the low-resistance charging path, and a high-resistance discharging path between the first output node and a second output node. The first output node is coupled to a control terminal of a pass gate transistor in some implementations. The low-resistance charging path charges a voltage on the first output node to a threshold voltage of the pass gate transistor, and the high-resistance charging path charges the voltage on the first output node greater than the threshold voltage of the pass gate transistor. The high-resistance discharging path discharges the voltage on the first output node.

    DEVICE, SYSTEM, AND METHOD FOR INTRA-PACKAGE ELECTROMAGNETIC INTERFERENCE SUPPRESSION

    公开(公告)号:US20230283287A1

    公开(公告)日:2023-09-07

    申请号:US17685676

    申请日:2022-03-03

    Abstract: A device includes a voltage converter and an analog to digital converter (ADC). The voltage converter includes an input to receive a first voltage and an output to output a second voltage based on a switching signal having a first discrete converter frequency and a second discrete converter frequency. The ADC is coupled to and proximate to the voltage converter. The ADC includes a digital filter configured to substantially attenuate a first filter frequency and a second filter frequency. The voltage converter further includes a frequency control device configured to set the first discrete converter frequency and the second discrete converter frequency so that the first discrete converter frequency is approximately equal to the first filter frequency and the second discrete converter frequency is approximately equal to the second filter frequency.

    Constant ripple algorithm in DCM for buck converter

    公开(公告)号:US12301096B2

    公开(公告)日:2025-05-13

    申请号:US18439923

    申请日:2024-02-13

    Abstract: A ripple voltage detector circuit comprises a pulse generator, a direct current-to-direct current (DC-DC) converter coupled to the pulse generator, and a first control loop coupled to the pulse generator and the DC-DC converter. The first control loop is configured to measure an output voltage of the DC-DC converter, determine an output ripple voltage of the output voltage, determine a ripple coefficient based on the output ripple voltage, determine a reference peak inductor current based on the ripple coefficient, and determine a peak value of an inductor current during a switching cycle, and transition a switching state of the DC-DC converter based on the reference peak inductor current and the peak value of the inductor current.

    Pass gate driver
    7.
    发明授权

    公开(公告)号:US12231032B2

    公开(公告)日:2025-02-18

    申请号:US18391809

    申请日:2023-12-21

    Abstract: A driver includes a low-resistance charging path between a supply voltage rail and a first output node, a high-resistance charging path between the supply voltage rail and the first output node, an inverter coupled to the first output node and configured to enable and disable the low-resistance charging path, and a high-resistance discharging path between the first output node and a second output node. The first output node is coupled to a control terminal of a pass gate transistor in some implementations. The low-resistance charging path charges a voltage on the first output node to a threshold voltage of the pass gate transistor, and the high-resistance charging path charges the voltage on the first output node greater than the threshold voltage of the pass gate transistor. The high-resistance discharging path discharges the voltage on the first output node.

    Digital LDO passgate rotation
    8.
    发明授权

    公开(公告)号:US12079019B2

    公开(公告)日:2024-09-03

    申请号:US17323924

    申请日:2021-05-18

    CPC classification number: G05F1/575

    Abstract: A system includes a digital controller in a voltage regulator. The system also includes a passgate array including two or more passgate transistors, where the passgate array is configured to provide a load current to a load, and where the digital controller is configured to activate and deactivate each passgate transistor in the passgate array. The system also includes a feedback loop configured to provide an error signal to the digital controller, the error signal based on a difference between an output voltage of the voltage regulator and a programmed voltage for the voltage regulator. The digital controller is configured to activate or deactivate a passgate transistor based at least in part on the error signal. The digital controller is also configured to activate at least one passgate transistor and deactivate at least one passgate transistor responsive to a clock cycle.

    Multiplying spread-spectrum generator

    公开(公告)号:US11936391B2

    公开(公告)日:2024-03-19

    申请号:US17876473

    申请日:2022-07-28

    CPC classification number: H03L7/099 H03L7/087 H04B2201/7073

    Abstract: In some examples, a circuit includes a phase frequency detector (PFD) having a first input, a second input, and an output. The circuit also includes a control circuit having an input and an output, the control circuit input coupled to the output of the PFD. The circuit also includes a modulation circuit having an input and an output, the modulation circuit input coupled to the output of the control circuit. The circuit also includes an oscillator having an oscillator input and an oscillator output, the oscillator input coupled to the output of the modulation circuit and the output of the oscillator coupled to the second input of the PFD.

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