LATENCY AND JITTER FOR TRAFFIC OVER PCIE

    公开(公告)号:US20220206977A1

    公开(公告)日:2022-06-30

    申请号:US17139441

    申请日:2020-12-31

    Abstract: A method includes transmitting first data with a first priority through a first dedicated interface on a transmit side of a PCIe system. The method also includes transmitting second data with a second priority through a second dedicated interface on the transmit side of the PCIe system. The method includes transmitting the first data and the second data to a receive side of the PCIe system using two or more virtual channels over a PCIe link, where the first data uses a first virtual channel and the second data uses a second virtual channel.

    TRANSMIT AND RECEIVE CIRCUITS WITH MULTIPLE INTERFACES

    公开(公告)号:US20240012774A1

    公开(公告)日:2024-01-11

    申请号:US18473391

    申请日:2023-09-25

    CPC classification number: G06F13/1668 G06F13/4022

    Abstract: A method includes transmitting first data with a first priority through a first dedicated interface on a transmit side of a PCIe system. The method also includes transmitting second data with a second priority through a second dedicated interface on the transmit side of the PCIe system. The method includes transmitting the first data and the second data to a receive side of the PCIe system using two or more virtual channels over a PCIe link, where the first data uses a first virtual channel and the second data uses a second virtual channel.

    LATENCY AND JITTER FOR TRAFFIC OVER PCIE

    公开(公告)号:US20230012529A1

    公开(公告)日:2023-01-19

    申请号:US17946675

    申请日:2022-09-16

    Abstract: A method includes transmitting first data with a first priority through a first dedicated interface on a transmit side of a PCIe system. The method also includes transmitting second data with a second priority through a second dedicated interface on the transmit side of the PCIe system. The method includes transmitting the first data and the second data to a receive side of the PCIe system using two or more virtual channels over a PCIe link, where the first data uses a first virtual channel and the second data uses a second virtual channel.

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