公开(公告)号：US20200209931A1

公开(公告)日：2020-07-02

申请号：US16814625

申请日：2020-03-10

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Venkateswar Reddy Kowkutla ,  Chunhua Hu ,  Erkan Bilhan ,  Sumant Dinkar Kale

IPC: G06F1/24 ,  G06F1/28

Abstract: A functional safety POR system requires implementing voltage detectors and supervisory functions in a complex SOC. These features are implemented within the SOC without external components. Three stages of voltage monitoring are implemented to ensure redundancy.

公开(公告)号：US20180183434A1

公开(公告)日：2018-06-28

申请号：US15387683

申请日：2016-12-22

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Venkateswar Reddy Kowkutla ,  Erkan Bilhan ,  Sumant Dinkar Kale ,  Chunhua Hu

IPC: H03K17/22 ,  H03B5/32

CPC classification number: H03K17/22 ,  G06F11/1441 ,  H03B5/32

Abstract: A functional safety Power on Reset system requires implementing voltage detectors and supervisory functions in a complex SOC. These features are implemented within the SOC without external components. A plurality of voltage monitoring stages is implemented to ensure redundancy.

公开(公告)号：US11269389B2

公开(公告)日：2022-03-08

申请号：US16814625

申请日：2020-03-10

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Venkateswar Reddy Kowkutla ,  Chunhua Hu ,  Erkan Bilhan ,  Sumant Dinkar Kale

IPC: G06F1/24 ,  G06F1/28

Abstract: A functional safety POR system requires implementing voltage detectors and supervisory functions in a complex SOC. These features are implemented within the SOC without external components. Three stages of voltage monitoring are implemented to ensure redundancy.

公开(公告)号：US10134483B2

公开(公告)日：2018-11-20

申请号：US15275694

申请日：2016-09-26

Applicant: Texas Instruments Incorporated

Inventor： Devanathan Varadarajan ,  Sumant Dinkar Kale

IPC: G11C29/44 ,  G11C29/12 ,  G06F11/20 ,  G11C29/00 ,  G01R31/28

Abstract: A large-scale integrated circuit with built-in self-repair (BISR) circuitry for enabling redundancy repair for embedded memories in each of a plurality of processor cores with embedded built-in self-test (BIST) circuitry. The BISR circuitry receives and decodes BIST data from the embedded memories into fail signature data in a physical-aware form on which repair analysis can be performed. The fail signature data is reformatted into a unified repair format, such that a fuse encoder circuit can be used to encode fuse patterns in that unified repair format for a repair entity for each of the embedded memories. The fuse patterns are reconfigured into the appropriate order for storing in shadow fuse registers associated with the specific embedded memories.

公开(公告)号：US20240178832A1

公开(公告)日：2024-05-30

申请号：US18432430

申请日：2024-02-05

Applicant: Texas Instruments Incorporated

Inventor： Venkateswar Reddy Kowkutla ,  Chunhua Hu ,  Erkan Bilhan ,  Sumant Dinkar Kale

IPC: H03K17/22 ,  G05B19/042 ,  G06F1/24 ,  G06F1/3296 ,  H03K17/30

CPC classification number: H03K17/22 ,  G05B19/042 ,  G06F1/24 ,  G06F1/3296 ,  G05B2219/21119 ,  H03K17/30

Abstract: Systems and methods are provided for voltage monitoring and reset sequencing. One such system includes a voltage detector including multiple voltage level detectors to output multiple power OK signals, respectively; a trim adjustment circuit to output multiple trim values to the multiple voltage level detectors, respectively; and a sequencer circuit coupled to the trim adjustment circuit and the voltage detector. In response to receiving the power OK signals from the multiple voltage level detectors, the sequencer circuit controls output of a reset signal to a target voltage domain.

公开(公告)号：US11923836B2

公开(公告)日：2024-03-05

申请号：US16912057

申请日：2020-06-25

Applicant: Texas Instruments Incorporated

Inventor： Venkateswar Reddy Kowkutla ,  Chunhua Hu ,  Erkan Bilhan ,  Sumant Dinkar Kale

IPC: H03K17/22 ,  G05B19/042 ,  G06F1/24 ,  G06F1/3296 ,  H03K17/30

CPC classification number: H03K17/22 ,  G05B19/042 ,  G06F1/24 ,  G06F1/3296 ,  G05B2219/21119 ,  H03K17/30

Abstract: An example includes a circuit including a first AND gate including a first input terminal, a second input terminal, and an output terminal, a second AND gate including a first input terminal, a second input terminal, and an output terminal, and a third AND gate including a first input terminal, a second input terminal, and an output terminal. The circuit also includes an OR gate including a first input terminal coupled to the output terminal of the first AND gate, a second input terminal coupled to the output terminal of the second AND gate, a third input terminal coupled to the output terminal of the third AND gate, and an output terminal.

公开(公告)号：US10050617B2

公开(公告)日：2018-08-14

申请号：US15387683

申请日：2016-12-22

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Venkateswar Reddy Kowkutla ,  Erkan Bilhan ,  Sumant Dinkar Kale ,  Chunhua Hu

IPC: H03K17/22 ,  H03B5/32

CPC classification number: H03K17/22 ,  H03B5/32

Abstract: A functional safety Power on Reset system requires implementing voltage detectors and supervisory functions in a complex SOC. These features are implemented within the SOC without external components. A plurality of voltage monitoring stages is implemented to ensure redundancy.

公开(公告)号：US20200328738A1

公开(公告)日：2020-10-15

申请号：US16912057

申请日：2020-06-25

Applicant: Texas Instruments Incorporated

Inventor： Venkateswar Reddy Kowkutla ,  Chunhua Hu ,  Erkan Bilhan ,  Sumant Dinkar Kale

IPC: H03K17/22 ,  G05B19/042 ,  G06F1/24 ,  G06F1/3296

Abstract: An example includes a circuit including a first AND gate including a first input terminal, a second input terminal, and an output terminal, a second AND gate including a first input terminal, a second input terminal, and an output terminal, and a third AND gate including a first input terminal, a second input terminal, and an output terminal. The circuit also includes an OR gate including a first input terminal coupled to the output terminal of the first AND gate, a second input terminal coupled to the output terminal of the second AND gate, a third input terminal coupled to the output terminal of the third AND gate, and an output terminal.

公开(公告)号：US10734993B2

公开(公告)日：2020-08-04

申请号：US15393513

申请日：2016-12-29

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Venkateswar Reddy Kowkutla ,  Chunhua Hu ,  Erkan Bilhan ,  Sumant Dinkar Kale

IPC: G05B19/042 ,  G06F1/24 ,  G06F1/3296 ,  H03K17/22 ,  H03K17/30

Abstract: The optimal operating voltage of a complex SoC may be influenced by process variations. The operating voltages may be dynamically adjusted for optimal performance. These adjustments require a dynamic reconfiguration of the voltage monitoring thresholds in the power on reset circuitry of the SoC.

公开(公告)号：US20180191343A1

公开(公告)日：2018-07-05

申请号：US15393513

申请日：2016-12-29

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Venkateswar Reddy Kowkutla ,  Chunhua Hu ,  Erkan Bilhan ,  Sumant Dinkar Kale

IPC: H03K17/22 ,  H03K17/30 ,  G05B19/042

CPC classification number: H03K17/22 ,  G05B19/042 ,  G05B2219/21119 ,  G06F1/24 ,  G06F1/3296 ,  H03K17/30

Abstract: The optimal operating voltage of a complex SoC may be influenced by process variations. The operating voltages may be dynamically adjusted for optimal performance. These adjustments require a dynamic reconfiguration of the voltage monitoring thresholds in the power on reset circuitry of the SoC.