Skew compensation for multi-domain clock generation

    公开(公告)号:US10536258B2

    公开(公告)日:2020-01-14

    申请号:US15996444

    申请日:2018-06-02

    Abstract: Multi-domain clock generation with skew compensation is based on free-running counters in each of the multiple clock domains. Multi-domain clock generation circuitry provides at least first and second domain clocks generated with randomization, each based on an input clock with an input clock frequency, the domain clocks having a relative clock skew that is varied over time in magnitude and direction. A first circuit in a first clock domain, configured for operation with the first domain clock, includes a first free-running counter with a pre-defined first selected roll-over count, to generate a first free-running count (N1(k)) based on the first domain clock. A second circuit in a second clock domain is configured for operation with the second domain clock, and includes a second free-running counter with a pre-defined second selected roll-over count, to generate a second free-running count (N2(k)) based on the second domain clock.

    SKEW COMPENSATION FOR MULTI-DOMAIN CLOCK GENERATION

    公开(公告)号:US20190372747A1

    公开(公告)日:2019-12-05

    申请号:US15996444

    申请日:2018-06-02

    Abstract: Multi-domain clock generation with skew compensation is based on free-running counters in each of the multiple clock domains. Multi-domain clock generation circuitry provides at least first and second domain clocks generated with randomization, each based on an input clock with an input clock frequency, the domain clocks having a relative clock skew that is varied over time in magnitude and direction. A first circuit in a first clock domain, configured for operation with the first domain clock, includes a first free-running counter with a pre-defined first selected roll-over count, to generate a first free-running count (N1(k)) based on the first domain clock. A second circuit in a second clock domain is configured for operation with the second domain clock, and includes a second free-running counter with a pre-defined second selected roll-over count, to generate a second free-running count (N2(k)) based on the second domain clock.

    DYNAMIC FRAME PADDING IN A VIDEO HARDWARE ENGINE
    7.
    发明申请
    DYNAMIC FRAME PADDING IN A VIDEO HARDWARE ENGINE 审中-公开
    视频硬件引擎中的动态框架

    公开(公告)号:US20150271512A1

    公开(公告)日:2015-09-24

    申请号:US14661770

    申请日:2015-03-18

    CPC classification number: H04N19/43 H04N19/51

    Abstract: A video hardware engine which support dynamic frame padding is disclosed. The video hardware engine includes an external memory. The external memory stores a reference frame. The reference frame includes a plurality of reference pixels. A motion estimation (ME) engine receives a current LCU (largest coding unit), and defines a search area around the current LCU for motion estimation. The ME engine receives a set of reference pixels corresponding to the current LCU. The set of reference pixels of the plurality of reference pixels are received from the external memory. The ME engine pads a set of duplicate pixels along an edge of the reference frame when a part area of the search area is outside the reference frame.

    Abstract translation: 公开了支持动态帧填充的视频硬件引擎。 视频硬件引擎包括外部存储器。 外部存储器存储参考帧。 参考帧包括多个参考像素。 运动估计(ME)引擎接收当前LCU(最大编码单元),并且定义当前LCU周围的运动估计周围的搜索区域。 ME引擎接收与当前LCU对应的一组参考像素。 从外部存储器接收多个参考像素的参考像素集合。 当搜索区域的一部分区域在参考帧之外时,ME引擎沿着参考帧的边缘焊接一组重复像素。

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