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Patent Agency Ranking
公开(公告)号：US20140125198A1
公开(公告)日：2014-05-08
申请号：US13670735
申请日：2012-11-07
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Stuart M. JACOBSEN , Sridhar RAMASWAMY , William Robert KRENIK
IPC: H01L41/02
CPC classification number: H01L27/20 , H01L41/29 , H03H9/0542 , H03H9/175
Abstract: A semiconductor device comprises a semiconductor wafer; a piezoelectric resonator formed on the wafer, and an active circuit also formed on the wafer. The active circuit (e.g., a frequency divider) is electrically connected to the piezoelectric resonator.
Abstract translation: 半导体器件包括半导体晶片; 形成在晶片上的压电谐振器和还形成在晶片上的有源电路。 有源电路（例如，分频器）电连接到压电谐振器。
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公开(公告)号：US20190386627A1
公开(公告)日：2019-12-19
申请号：US16551757
申请日：2019-08-27
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Byron Neville BURGESS , William Robert KRENIK , Stuart M. JACOBSEN
Abstract: A method of forming a resonator includes forming top and bottom dielectric structures over a substrate. A piezoelectric layer is formed between the top and bottom dielectric structures. A bottom electrode is formed between the piezoelectric layer and the bottom dielectric structure, and a top electrode is formed between the piezoelectric layer and the top dielectric structure. A metal layer is formed over the top dielectric structure and is patterned, thereby forming a first contact pad making electrical contact to the top electrode, a second contact pad making electrical contact with the bottom electrode, and a mass bias located over the top dielectric structure.
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公开(公告)号：US20200382131A1
公开(公告)日：2020-12-03
申请号：US16730612
申请日：2019-12-30
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Keliu SHU , Gary Franklin CHARD , William Robert KRENIK
Abstract: A circuit includes a phase-locked loop having a phase-locked loop output to provide a first phase signal and a second phase signal phase delayed with respect to the first phase signal. The circuit further includes a digital circuit having a digital circuit input and an output. The digital circuit input couples to the phase-locked loop output. On the digital circuit output, the digital circuit is configured to provide a first digital-to-analog converter (DAC) enable signal and a second DAC enable signal. The circuit also includes first and second DACs. The first DAC is coupled to the digital circuit. The first DAC has a first enable input coupled to the digital circuit output to receive the first DAC enable signal. The second DAC is coupled to the digital circuit. The second DAC has a second enable input coupled to the digital circuit output to receive the second DAC enable signal.
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公开(公告)号：US20150340405A1
公开(公告)日：2015-11-26
申请号：US14816266
申请日：2015-08-03
Applicant: Texas Instruments Incorporated
Inventor： Stuart M. JACOBSEN , Sridhar RAMASWAMY , William Robert KRENIK
CPC classification number: H01L27/20 , H01L41/29 , H03H9/0542 , H03H9/175
Abstract: A semiconductor device comprises a semiconductor wafer; a piezoelectric resonator formed on the wafer, and an active circuit also formed on the wafer. The active circuit (e.g., a frequency divider) is electrically connected to the piezoelectric resonator.
Abstract translation: 半导体器件包括半导体晶片; 形成在晶片上的压电谐振器和还形成在晶片上的有源电路。 有源电路（例如，分频器）电连接到压电谐振器。
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公开(公告)号：US20160105156A1
公开(公告)日：2016-04-14
申请号：US14970676
申请日：2015-12-16
Applicant: Texas Instruments Incorporated
Inventor： Byron Neville BURGESS , William Robert KRENIK , Stuart M. JACOBSEN
IPC: H03H3/02
CPC classification number: H03H3/02 , H01L23/3107 , H01L23/3171 , H01L23/49838 , H03H9/02102 , H03H9/02149 , H03H9/1007 , H03H9/1057 , H03H9/175 , Y10T29/42 , Y10T29/49171 , Y10T29/49172
Abstract: An integrated resonator apparatus includes a piezoelectric resonator and an acoustic Bragg reflector formed adjacent the piezoelectric resonator. The integrated resonator apparatus also includes a mass bias formed over the Bragg reflector on a side of the piezoelectric resonator opposite the piezoelectric resonator.
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