公开(公告)号：US20170170722A1

公开(公告)日：2017-06-15

申请号：US15116072

申请日：2015-02-05

Applicant: THE REGENTS OF THE UNIVERSITY OF MICHIGAN

Inventor： Wanyeong JUNG ,  Sechang OH ,  Suyoung BANG ,  Yoonmyung LEE ,  Dennis SYLVESTER ,  David T. BLAAUW

IPC: H02M3/07 ,  H03K19/0175 ,  H02M1/36 ,  H03K3/03

CPC classification number: H02M3/07 ,  H02M1/36 ,  H03K3/0315 ,  H03K19/017509

Abstract: A self-oscillating DC-DC converter structure is proposed in which an oscillator is completely internalized within the switched-capacitor network. This eliminates power overhead of clock generation and level shifting and enables higher efficiency at lower power levels. Voltage doublers are cascaded to form a complete energy harvester with a wide load range from 5 nW to 5 μW and self-starting operation down to 140 mV. Because each doubler is self-oscillating, the frequency of each stage can be independently modulated, thereby optimizing the overall conversion efficiency.

公开(公告)号：US20210344306A1

公开(公告)日：2021-11-04

申请号：US17243721

申请日：2021-04-29

Applicant: THE REGENTS OF THE UNIVERSITY OF MICHIGAN

Inventor： Rohit ROTHE ,  Sechang OH ,  Kyojin CHOO ,  Seok Hyeon JEONG ,  Dennis SYLVESTER ,  David T. BLAAUW

IPC: H03F1/34 ,  H03F3/45

Abstract: An amplifier is presented with a sample and average common mode feedback resistor. The amplifier circuit includes a feedback capacitor and a feedback resistor in parallel with the feedback capacitor, where the feedback capacitor and the feedback resistor form part of the negative feedback path for the amplifier. Of note, the feedback resistor is comprised of a low pass filter in series with a switched capacitor resistor, such that the low pass filter is electrically coupled to the output of the amplifier circuit and the switched capacitor resistor is electrically coupled to the inverting input of the amplifier circuit. The amplifier circuit further includes a control circuit interfaced with switches of the switched capacitor resistor. The high pass corner of the switched capacitor resistor is preferably lower than corner of the low pass filter.

公开(公告)号：US20150357986A1

公开(公告)日：2015-12-10

申请号：US14298051

申请日：2014-06-06

Applicant: THE REGENTS OF THE UNIVERSITY OF MICHIGAN

Inventor： Sechang OH ,  Wanyeong JUNG ,  David Theodore BLAAUW ,  Dennis Michael SYLVESTER

IPC: H03H7/00 ,  H03M1/66

CPC classification number: H03M1/66 ,  H03M1/066 ,  H03M1/46

Abstract: Circuitry formed of a two-dimensional regular array of capacitive elements 2 is coupled to decoding circuitry in the form of column decoder 8 and a row decoder 6. The decoders 8, 6 are used to select a start point and an end point within a sequence of selected capacitive elements to be connected in parallel following a horizontal raster scan arrangement. The selected capacitive elements may be used to generate an output voltage with a magnitude corresponding to the number of selected capacitive elements.

Abstract translation: 由电容元件2的二维规则阵列形成的电路以列解码器8和行解码器6的形式耦合到解码电路。解码器8,6用于选择序列内的起始点和终点 所选择的电容元件在水平光栅扫描装置之后并联连接。 所选择的电容元件可用于产生具有对应于所选择的电容元件的数量的幅度的输出电压。