公开(公告)号：US11990901B2

公开(公告)日：2024-05-21

申请号：US17940600

申请日：2022-09-08

Applicant: TOHOKU UNIVERSITY

Inventor： Ko Yoshikawa ,  Yitao Ma ,  Tetsuo Endoh ,  Osamu Nomura ,  Li Tao

IPC: H03K3/01 ,  G06F1/04 ,  G06F1/08 ,  G06F30/396 ,  H03K3/037 ,  H03K19/00 ,  H03K19/20

CPC classification number: H03K19/0016 ,  G06F1/04 ,  G06F1/08 ,  G06F30/396 ,  H03K3/037 ,  H03K19/20

Abstract: A semiconductor circuit device includes a first clock gating circuit that outputs a first gated clock signal generated from a clock signal and a first enable signal, a non-volatile first flip-flop that operates in response to a clock pulse of the first gated clock signal, an acquisition circuit that acquires data inputted from the first flip-flop according to a second enable signal that enables or disables the acquisition of the data from the first flip-flop, and a power gating circuit that supplies electric power to the first flip-flop and receives the first and second enable signals as power source control signals. The power gating circuit includes a power switch, and supplies the electric power to the first flip-flop by turning ON the power switch when the power source control signals have logical values that enable the clock signal or the acquisition of the data in the acquisition circuit.