公开(公告)号：US20240284803A1

公开(公告)日：2024-08-22

申请号：US17772765

申请日：2020-10-30

Applicant: TOHOKU UNIVERSITY

Inventor： Tetsuo Endoh ,  Yoshiaki Saito ,  Shoji Ikeda ,  Hideo Sato

IPC: H10N50/85 ,  H01F10/32 ,  H10B61/00 ,  H10N50/10

CPC classification number: H10N50/85 ,  H01F10/3254 ,  H01F10/329 ,  H10B61/00 ,  H10N50/10

Abstract: Provided are a tunnel junction stacked film having a high thermal stability, and a magnetic memory element and a magnetic memory using the tunnel junction stacked film. A tunnel junction stacked film 1 includes a recording layer 14 including a first ferromagnetic layer 24 containing boron, a tunnel junction layer 13 adjacent to the recording layer 14, and a reference layer 12 adjacent to the tunnel junction layer 13, wherein the first ferromagnetic layer 24 and the reference layer 12 are magnetized in a perpendicular direction with respect to a film surface, and the recording layer 14 includes a hafnium layer 25 adjacent to the first ferromagnetic layer 24.

公开(公告)号：US11990901B2

公开(公告)日：2024-05-21

申请号：US17940600

申请日：2022-09-08

Applicant: TOHOKU UNIVERSITY

Inventor： Ko Yoshikawa ,  Yitao Ma ,  Tetsuo Endoh ,  Osamu Nomura ,  Li Tao

IPC: H03K3/01 ,  G06F1/04 ,  G06F1/08 ,  G06F30/396 ,  H03K3/037 ,  H03K19/00 ,  H03K19/20

CPC classification number: H03K19/0016 ,  G06F1/04 ,  G06F1/08 ,  G06F30/396 ,  H03K3/037 ,  H03K19/20

Abstract: A semiconductor circuit device includes a first clock gating circuit that outputs a first gated clock signal generated from a clock signal and a first enable signal, a non-volatile first flip-flop that operates in response to a clock pulse of the first gated clock signal, an acquisition circuit that acquires data inputted from the first flip-flop according to a second enable signal that enables or disables the acquisition of the data from the first flip-flop, and a power gating circuit that supplies electric power to the first flip-flop and receives the first and second enable signals as power source control signals. The power gating circuit includes a power switch, and supplies the electric power to the first flip-flop by turning ON the power switch when the power source control signals have logical values that enable the clock signal or the acquisition of the data in the acquisition circuit.

公开(公告)号：US11914448B2

公开(公告)日：2024-02-27

申请号：US17423192

申请日：2019-02-06

Applicant: TOHOKU UNIVERSITY

Inventor： Tetsuo Endoh ,  Hui Shen ,  Yitao Ma

IPC: G06F1/26 ,  G06F1/32 ,  G06F1/3234 ,  G06F18/23 ,  G06F18/21

CPC classification number: G06F1/3275 ,  G06F18/217 ,  G06F18/23

Abstract: A clustering device includes: an evaluation score calculation section configured to calculate an evaluation score or evaluation scores for evaluating a classification result; a batch process section configured to classify multiple element data into clusters with an optimum number of clusters, based on the evaluation scores respectively obtained for different number of clusters by assigning each of the multiple element data to one of the clusters; an update process section configured to assign newly added element data to a cluster that is closest to the newly added element data among the clusters into which the multiple element data are classified by the batch process section; and a determination section configured to determine validity of a classification result after assigning the newly added element data to the cluster, based on the evaluation score obtained by assigning the newly added element data to the cluster by the update process section.

公开(公告)号：US20230013081A1

公开(公告)日：2023-01-19

申请号：US17765721

申请日：2020-10-01

Applicant: TOHOKU UNIVERSITY

Inventor： Yitao Ma ,  Tetsuo Endoh

IPC: G06N3/063 ,  G06N3/04

Abstract: Provided is a simplified driving method of a synapse circuit. In a case where a first pre-spike pulse precedes a first post-spike pulse, a second pre-spike pulse from an input circuit 20a is used as a time window that allows writing of a coupling weight, and the first post-spike pulse from a neuron circuit 17 is used as a write pulse for controlling a write timing of the coupling weight. In a case where the first post-spike pulse precedes the first pre-spike pulse, a second post-spike pulse from the neuron circuit 17 is used as the time window, and the first pre-spike pulse from the input circuit 20a is used as the write pulse. The second pre-spike pulse and the second post-spike pulse are output in synchronization with the first pre-spike pulse and the first post-spike pulse, respectively.

公开(公告)号：US11532667B2

公开(公告)日：2022-12-20

申请号：US17430040

申请日：2019-10-30

Applicant: TOHOKU UNIVERSITY

Inventor： Yoshiaki Saito ,  Shoji Ikeda ,  Hideo Sato ,  Tetsuo Endoh

IPC: G11C11/18 ,  H01L27/22 ,  G11C11/16 ,  H01F10/32 ,  H01L43/02 ,  H01L43/10

Abstract: Provided are a magnetic stacked film that is capable of improving a write efficiency, and a magnetic memory element and a magnetic memory using the magnetic stacked film. A magnetic stacked film 1 is a stacked film for a magnetic memory element 100, and includes: a heavy metal layer 2 that contains β phase W1-xTax (0.00

公开(公告)号：US20220066533A1

公开(公告)日：2022-03-03

申请号：US17423192

申请日：2019-02-06

Applicant: TOHOKU UNIVERSITY

Inventor： Tetsuo Endoh ,  Hui Shen ,  Yitao Ma

IPC: G06F1/3234 ,  G06K9/62

Abstract: A clustering device includes: an evaluation score calculation section configured to calculate an evaluation score or evaluation scores for evaluating a classification result; a batch process section configured to classify multiple element data into clusters with an optimum number of clusters, based on the evaluation scores respectively obtained for different number of clusters by assigning each of the multiple element data to one of the clusters; an update process section configured to assign newly added element data to a cluster that is closest to the newly added element data among the clusters into which the multiple element data are classified by the batch process section; and a determination section configured to determine validity of a classification result after assigning the newly added element data to the cluster, based on the evaluation score obtained by assigning the newly added element data to the cluster by the update process section.

公开(公告)号：US11264565B2

公开(公告)日：2022-03-01

申请号：US16843708

申请日：2020-04-08

Applicant: TOHOKU UNIVERSITY

Inventor： Hiroaki Honjo ,  Tetsuo Endoh ,  Hideo Sato ,  Shoji Ikeda

IPC: G11C11/15 ,  H01L27/22 ,  G11C11/16 ,  H01L43/08 ,  H01L43/10 ,  H01L43/02 ,  G01R33/09

Abstract: An object of the invention is to provide a magnetoresistance effect element which includes a reference layer having three or more magnetic layers and which improves a thermal stability factor Δ by decreasing a write error rate using an element structure that enables a wide margin to be secured between a current at which magnetization of the reference layer is reversed and a writing current Ic of a recording layer and by reducing an effect of a stray magnetic field from the reference layer.
The magnetoresistance effect element includes: a first recording layer (A1); a first non-magnetic layer (11); and a first reference layer (B1), wherein the first reference layer (B1) including n-number of a plurality of magnetic layers (21, 22, . . . , 2n) and (n−1)−number of a plurality of non-magnetic insertion layers (31, 32, . . . 3(n−1)) adjacently sandwiched by each of the plurality of magnetic layers, where n≥3.

公开(公告)号：US11081641B2

公开(公告)日：2021-08-03

申请号：US16479153

申请日：2017-01-18

Applicant: TOHOKU UNIVERSITY

Inventor： Hiroaki Honjo ,  Tetsuo Endoh ,  Shoji Ikeda ,  Hideo Sato ,  Hideo Ohno

IPC: H01L43/02 ,  H01L43/10 ,  H01L43/12 ,  H01L27/22 ,  G11C11/16 ,  H01L27/12

Abstract: The present invention provides a magnetoresistance effect element which has a high thermal stability factor Δ and in which a magnetization direction of a recording layer is a perpendicular direction with respect to a film surface, and a magnetic memory including the same. Magnetic layers of a recording layer of the magnetoresistance effect element are divided into at least two, and an Fe composition with respect to a sum total of atomic fractions of magnetic elements in each magnetic layer is changed before stacking the magnetic layers.

公开(公告)号：US10783936B2

公开(公告)日：2020-09-22

申请号：US16466812

申请日：2017-12-08

Applicant: Tohoku University

Inventor： Takahiro Hanyu ,  Daisuke Suzuki ,  Hideo Ohno ,  Tetsuo Endoh

IPC: G11C7/00 ,  G11C7/06 ,  G11C16/26

Abstract: In reading of a memory unit, an read failure operation due to variation in characteristic of a transistor in a dynamic load is reduced. A read circuit that reads a voltage obtained by a voltage division of a dynamic load unit and the memory unit as an output of the memory unit includes the dynamic load unit having one end connected to a side of a power supply and the other end connected to a side of the memory unit, and a feedback unit that, by a feedback of the voltage obtained by the voltage division that is divided between the dynamic load unit and the memory unit, holds the voltage obtained by the voltage division. The dynamic load unit has an array structure in which a plurality of resistive memory elements are connected in series, in parallel, or in series-parallel. The dynamic load unit has the array structure of the resistive memory elements and this structure can suppress the read failure operation due to the variation in dynamic load.

公开(公告)号：US20200219547A1

公开(公告)日：2020-07-09

申请号：US16089153

申请日：2017-03-27

Applicant: Tohoku University

Inventor： Yitao Ma ,  Tetsuo Endoh

IPC: G11C7/22 ,  G11C15/02 ,  G11C15/04

Abstract: A memory device capable of reading reference data while achieving optimization of electric power consumption is provided. A memory device includes a memory area storing reference data of N (≥1) dimensions each composed of M (≥1) bits. A number of memory grains each composed of nonvolatile memory and power drivers paired with the memory grains to supply electrical power to the memory grains are provided in each region specified by column lines in the number and M row lines, the number being one to N inclusive. When the power driver receives a control signal from the corresponding one of the column lines, a control signal from the corresponding one of the M row lines, and a clock signal, the power driver supplies electrical power to the memory grain in synchronization with the clock signal.