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公开(公告)号:US20190287998A1
公开(公告)日:2019-09-19
申请号:US16127763
申请日:2018-09-11
Applicant: TOSHIBA MEMORY CORPORATION
Inventor: Hisashi HARADA , Jun NISHIMURA , Ayaha HACHISUGA , Hiroshi NAKAKI , Yukie MIYAZAKI , Keisuke SUDA , Yu HIROTSU
IPC: H01L27/11582 , H01L29/10 , H01L29/06 , H01L27/11565 , H01L23/528
Abstract: A semiconductor device includes a base body portion, a stacked body, a pedestal portion, a plate portion, and first and second columnar portions. The base body portion includes a doped semiconductor film and a semiconductor portion. The doped semiconductor film includes first and second portions. The semiconductor portion includes a first region overlapping the first portion, and a second region overlapping the second portion and being a body different from the first region. The pedestal portion is provided in the second region. The plate portion contacts the pedestal portion and the first region. The first columnar portion includes a semiconductor layer. The semiconductor layer is adjacent to the plate portion with the stacked body interposed, and contacts the first region. The second columnar portion is adjacent to the plate portion with the stacked body interposed, and is adjacent to the pedestal portion with the second region interposed.
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公开(公告)号:US20200295016A1
公开(公告)日:2020-09-17
申请号:US16564434
申请日:2019-09-09
Applicant: Toshiba Memory Corporation
Inventor: Hisashi HARADA , Ayaha Hachisuga , Jun Nishimura
IPC: H01L27/1157 , H01L27/11524 , H01L27/11556 , H01L27/11519 , H01L21/28 , H01L27/11582 , H01L27/11565 , H01L23/522 , H01L23/528 , H01L21/768
Abstract: A semiconductor memory device according to an embodiment includes first to third conductive layers, first and second pillars, first and second contacts, and first to third members. The first pillar penetrates the first and second conductive layers in a first area. A second pillar penetrates the first and third conductive layers in the first area. The first and second contacts are provided on the second and third conductive layers respectively in a second area. The first and second members are provided between the second and third conductive layers in the first and second area, respectively. The third member penetrates the first conductive layers. The third member is in contact with each of the second and third conductive layers, and the first and second members.
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