公开(公告)号：US20210210592A1

公开(公告)日：2021-07-08

申请号：US17211035

申请日：2021-03-24

Applicant: TOSHIBA MEMORY CORPORATION

Inventor： Masahiro SHIMURA ,  Mitsuhiro NOGUCHI

IPC: H01L49/02 ,  H01L27/06 ,  H01L23/522

Abstract: A semiconductor device according to embodiments includes: a first conductivity-type first semiconductor layer set to a first potential; a second conductivity-type second semiconductor layer stacked on the first semiconductor layer and set to a second potential; an interlayer insulating film disposed on a main surface of the second semiconductor layer; a resistor disposed above the first semiconductor layer while interposing the second semiconductor layer and the interlayer insulating film therebetween; and a terminal electrically connected to the second semiconductor layer.

公开(公告)号：US20200295125A1

公开(公告)日：2020-09-17

申请号：US16564709

申请日：2019-09-09

Applicant: TOSHIBA MEMORY CORPORATION

Inventor： Masahiro SHIMURA ,  Mitsuhiro NOGUCHI

IPC: H01L49/02 ,  H01L23/522 ,  H01L27/06

Abstract: A semiconductor device according to embodiments includes: a first conductivity-type first semiconductor layer set to a first potential; a second conductivity-type second semiconductor layer stacked on the first semiconductor layer and set to a second potential; an interlayer insulating film disposed on a main surface of the second semiconductor layer; and a resistor disposed above the first semiconductor layer while interposing the second semiconductor layer and the interlayer insulating film therebetween; and a terminal electrically connected to the second semiconductor layer.

公开(公告)号：US20210028185A1

公开(公告)日：2021-01-28

申请号：US17071332

申请日：2020-10-15

Applicant: TOSHIBA MEMORY CORPORATION

Inventor： Tetsuya FURUKAWA ,  Tomoaki SHINO ,  Mitsuhiro NOGUCHI ,  Shinichi WATANABE ,  Yukio NISHIDA ,  Hiroyasu TANAKA

IPC: H01L27/11573 ,  H01L27/11526 ,  H01L29/49 ,  H01L29/06 ,  H01L29/51 ,  H01L29/423

Abstract: A semiconductor memory device includes: a semiconductor substrate; a memory cell array provided in a first region; a first transistor provided in a second region; a second transistor provided in a third region; and an insulative laminated film. The first and second transistors each include a semiconductor layer, a gate electrode, and a gate insulating film. A concentration of boron (B) in the gate electrode of the second transistor is higher than that of the first transistor. The insulative laminated film includes a first insulating film contacting the surface of the semiconductor substrate, and a second insulating film having a smaller diffusion coefficient of hydrogen (H) than that of the first insulating film. The second insulating film has a first portion contacting the semiconductor portion, and the first portion surrounds the third region.

公开(公告)号：US20200066743A1

公开(公告)日：2020-02-27

申请号：US16271992

申请日：2019-02-11

Applicant: TOSHIBA MEMORY CORPORATION

Inventor： Tetsuya FURUKAWA ,  Tomoaki SHINO ,  Mitsuhiro NOGUCHI ,  Shinichi WATANABE ,  Yukio NISHIDA ,  Hiroyasu TANAKA

IPC: H01L27/11573 ,  H01L27/11526 ,  H01L29/49 ,  H01L29/51 ,  H01L29/423 ,  H01L29/06

Abstract: A semiconductor memory device includes: a semiconductor substrate; a memory cell array provided in a first region; a first transistor provided in a second region; a second transistor provided in a third region; and an insulative laminated film. The first and second transistors each include a semiconductor layer, a gate electrode, and a gate insulating film. A concentration of boron (B) in the gate electrode of the second transistor is higher than that of the first transistor. The insulative laminated film includes a first insulating film contacting the surface of the semiconductor substrate, and a second insulating film having a smaller diffusion coefficient of hydrogen (H) than that of the first insulating film. The second insulating film has a first portion contacting the semiconductor portion, and the first portion surrounds the third region.