公开(公告)号：US08324109B2

公开(公告)日：2012-12-04

申请号：US12642496

申请日：2009-12-18

Applicant: Tae-Han Kim ,  Dong-Hyun Kim

Inventor： Tae-Han Kim ,  Dong-Hyun Kim

IPC: H01L21/302 ,  H01L21/461

CPC classification number: H01L21/28247 ,  H01L21/28061 ,  H01L29/4941

Abstract: A method for fabricating a semiconductor device includes forming a gate insulation layer over a substrate, sequentially forming a silicon layer and a metal layer over the gate insulation layer, performing a first gate etching process to etch the metal layer using a gate hard mask layer, formed on the metal layer, as an etch barrier, and then partially etch the silicon layer, thereby forming a first pattern, performing a second gate etching process to partially etch the silicon layer, thereby forming an undercut beneath the metal layer, forming a capping layer on both sidewalls of the first pattern including the undercut, performing a third gate etching process to etch the silicon layer to expose the gate insulation layer using the gate hard mask layer and the capping layer as an etch barrier, thereby forming a second pattern, and performing a gate re-oxidation process.

Abstract translation: 一种制造半导体器件的方法包括在衬底上形成栅极绝缘层，在栅极绝缘层上依次形成硅层和金属层，执行第一栅极蚀刻工艺以使用栅极硬掩模层来蚀刻金属层， 形成在金属层上，作为蚀刻阻挡层，然后部分地蚀刻硅层，由此形成第一图案，执行第二栅极蚀刻工艺以部分蚀刻硅层，从而在金属层下方形成底切，形成封盖 在包括底切的第一图案的两个侧壁上，执行第三栅极蚀刻工艺以蚀刻硅层，以使用栅极硬掩模层和封盖层作为蚀刻阻挡层来露出栅极绝缘层，从而形成第二图案， 并进行栅极再氧化处理。

公开(公告)号：US07629218B2

公开(公告)日：2009-12-08

申请号：US11592177

申请日：2006-11-03

Applicant: Woo-Sung Lee ,  Man-Sug Kang ,  Tae-Han Kim ,  Keum-Joo Lee

Inventor： Woo-Sung Lee ,  Man-Sug Kang ,  Tae-Han Kim ,  Keum-Joo Lee

IPC: H01L21/8242

CPC classification number: H01L28/91 ,  H01L27/10814 ,  H01L27/10852

Abstract: Example embodiments relate to a method of manufacturing a capacitor and a method of manufacturing a semiconductor device using the same. Other example embodiments relate to a method of manufacturing a capacitor having improved characteristics and a method of manufacturing a semiconductor device using the same. In a method of manufacturing a capacitor having improved characteristics, an insulation layer, including a pad therein, may be formed on a substrate. An etch stop layer may be formed on the insulation layer. A mold layer may be formed on the etch stop layer. The mold layer may be partially etched by a first etching process to form a first contact hole exposing the etch stop layer. The mold layer may be partially etched by a second etching process to form a second contact hole. The exposed etch stop layer may be etched by a third etching process to form a third contact hole exposing the pad. A native oxide layer on the exposed pad may be removed by a fourth etching process to form a capacitor contact hole. A conductive layer may be formed in the capacitor contact hole to form a capacitor.

Abstract translation: 示例性实施例涉及制造电容器的方法和使用其制造半导体器件的方法。 其他示例性实施例涉及制造具有改进特性的电容器的方法以及使用其制造半导体器件的方法。 在制造具有改进特性的电容器的方法中，可以在衬底上形成包括衬垫的绝缘层。 可以在绝缘层上形成蚀刻停止层。 可以在蚀刻停止层上形成模具层。 可以通过第一蚀刻工艺部分蚀刻模具层，以形成露出蚀刻停止层的第一接触孔。 可以通过第二蚀刻工艺部分地蚀刻模具层以形成第二接触孔。 可以通过第三蚀刻工艺蚀刻暴露的蚀刻停止层，以形成露出焊盘的第三接触孔。 暴露焊盘上的自然氧化物层可以通过第四蚀刻工艺去除以形成电容器接触孔。 可以在电容器接触孔中形成导电层以形成电容器。

公开(公告)号：US09640571B2

公开(公告)日：2017-05-02

申请号：US14792862

申请日：2015-07-07

Applicant: Seung-Sik Kim ,  Young-Chan Kim ,  Eun-Sub Shim ,  Min-Seok Oh ,  Ji-Won Lee ,  Moo-Sup Lim ,  Tae-Han Kim ,  Dong-Joo Yang

Inventor： Seung-Sik Kim ,  Young-Chan Kim ,  Eun-Sub Shim ,  Min-Seok Oh ,  Ji-Won Lee ,  Moo-Sup Lim ,  Tae-Han Kim ,  Dong-Joo Yang

IPC: H01L27/148 ,  H01L27/146

CPC classification number: H01L27/14612 ,  H01L27/14603 ,  H01L27/14623 ,  H01L27/14641

Abstract: Pixel arrays of an image sensor that include a first pixel and a second pixel adjacent the first pixel are provided. The first pixel may include a first photoelectric conversion device, a first charge storage device, a first floating diffusion node and a first transfer gate. The second pixel may include a second photoelectric conversion device, a second charge storage device, a second floating diffusion node and a second transfer gate. The pixel arrays may also include a storage gate on both the first charge storage device and the second charge storage device. The storage gate may have a unitary structure.

公开(公告)号：US08035788B2

公开(公告)日：2011-10-11

申请号：US12213293

申请日：2008-06-17

Applicant: Tae-Han Kim ,  In-Hyuk Song ,  Kyung-Eon Lee

Inventor： Tae-Han Kim ,  In-Hyuk Song ,  Kyung-Eon Lee

IPC: G02F1/1343 ,  G02F1/1333

CPC classification number: G02F1/133707 ,  G02F1/1323 ,  G02F1/133512 ,  G02F1/133514 ,  G02F2001/134345

Abstract: A liquid crystal display device includes: first and second substrates facing and spaced apart from each other, each of the first and second substrates having an image-displaying sub pixel and a viewing angle-adjusting sub pixel; a thin film transistor corresponding to each of the image-displaying sub pixel and the viewing angle-adjusting sub pixel; a liquid crystal display layer between the first and second substrates, the liquid crystal layer having a negative dielectric constant anisotropy; a first field distortion means in the image-displaying sub pixel; and a second field distortion means in the viewing angle-adjusting sub pixel.

Abstract translation: 液晶显示装置包括：面对并彼此分开的第一和第二基板，第一和第二基板中的每一个具有图像显示子像素和视角调整子像素; 对应于图像显示子像素和视角调整子像素中的每一个的薄膜晶体管; 在第一和第二基板之间的液晶显示层，液晶层具有负的介电常数各向异性; 图像显示子像素中的第一场失真装置; 以及视角调整子像素中的第二场失真装置。

公开(公告)号：US20120052647A1

公开(公告)日：2012-03-01

申请号：US13194030

申请日：2011-07-29

Applicant: Kyu-Tae Kim ,  Jong-Seo Hong ,  Tae-Han Kim

Inventor： Kyu-Tae Kim ,  Jong-Seo Hong ,  Tae-Han Kim

IPC: H01L21/336 ,  H01L21/28

CPC classification number: H01L29/66545 ,  H01L21/28114 ,  H01L21/28238 ,  H01L29/42376 ,  H01L29/4966 ,  H01L29/66553 ,  H01L29/66628 ,  H01L29/7834

Abstract: A method for fabricating a semiconductor device is disclosed. One embodiment of the method includes forming a dummy gate pattern on a substrate, forming an interlayer dielectric film that covers the dummy gate pattern, exposing a top surface of the dummy gate pattern, selectively removing the dummy gate pattern to form a first gate trench, forming a sacrificial layer pattern over a top surface of the substrate in the first gate trench, the sacrificial layer pattern leaving a top portion of the first gate trench exposed, increasing an upper width of the exposed top portion of the first gate trench to form a second gate trench, and removing the sacrificial layer pattern in the second gate trench, and forming a non-dummy gate pattern in the second gate trench.

Abstract translation: 公开了一种制造半导体器件的方法。 该方法的一个实施例包括在衬底上形成伪栅极图案，形成覆盖伪栅极图案的层间电介质膜，暴露伪栅极图案的顶表面，选择性地去除伪栅极图案以形成第一栅极沟槽， 在所述第一栅极沟槽中的所述衬底的顶表面上形成牺牲层图案，所述牺牲层图案离开所述第一栅极沟槽的顶部部分而暴露，从而增加所述第一栅极沟槽的暴露顶部的上部宽度，以形成 第二栅极沟槽，并且去除第二栅极沟槽中的牺牲层图案，以及在第二栅极沟槽中形成非虚拟栅极图案。

公开(公告)号：US20110316827A1

公开(公告)日：2011-12-29

申请号：US13226214

申请日：2011-09-06

Applicant: Tae-Han Kim ,  In-Hyuk Song ,  Kyung-Eon Lee

Inventor： Tae-Han Kim ,  In-Hyuk Song ,  Kyung-Eon Lee

IPC: G09G3/36 ,  G09G5/00 ,  H01L33/08

CPC classification number: G02F1/133707 ,  G02F1/1323 ,  G02F1/133512 ,  G02F1/133514 ,  G02F2001/134345

Abstract: A liquid crystal display device includes: first and second substrates facing and spaced apart from each other, each of the first and second substrates having an image-displaying sub pixel and a viewing angle-adjusting sub pixel; a thin film transistor corresponding to each of the image-displaying sub pixel and the viewing angle-adjusting sub pixel; a liquid crystal display layer between the first and second substrates, the liquid crystal layer having a negative dielectric constant anisotropy; a first field distortion means in the image-displaying sub pixel; and a second field distortion means in the viewing angle-adjusting sub pixel.

Abstract translation: 液晶显示装置包括：面对并彼此分开的第一和第二基板，第一和第二基板中的每一个具有图像显示子像素和视角调整子像素; 对应于图像显示子像素和视角调整子像素中的每一个的薄膜晶体管; 在第一和第二基板之间的液晶显示层，液晶层具有负的介电常数各向异性; 图像显示子像素中的第一场失真装置; 以及视角调整子像素中的第二场失真装置。

公开(公告)号：US20090303420A1

公开(公告)日：2009-12-10

申请号：US12213293

申请日：2008-06-17

Applicant: Tae-Han Kim ,  In-Hyuk Song ,  Kyung-Eon Lee

Inventor： Tae-Han Kim ,  In-Hyuk Song ,  Kyung-Eon Lee

IPC: G02F1/133 ,  G02F1/1335 ,  G02F1/13

CPC classification number: G02F1/133707 ,  G02F1/1323 ,  G02F1/133512 ,  G02F1/133514 ,  G02F2001/134345

Abstract: A liquid crystal display device includes: first and second substrates facing and spaced apart from each other, each of the first and second substrates having an image-displaying sub pixel and a viewing angle-adjusting sub pixel; a thin film transistor corresponding to each of the image-displaying sub pixel and the viewing angle-adjusting sub pixel; a liquid crystal display layer between the first and second substrates, the liquid crystal layer having a negative dielectric constant anisotropy; a first field distortion means in the image-displaying sub pixel; and a second field distortion means in the viewing angle-adjusting sub pixel.

Abstract translation: 液晶显示装置包括：面对并彼此分开的第一和第二基板，第一和第二基板中的每一个具有图像显示子像素和视角调整子像素; 对应于图像显示子像素和视角调整子像素中的每一个的薄膜晶体管; 在第一和第二基板之间的液晶显示层，液晶层具有负的介电常数各向异性; 图像显示子像素中的第一场失真装置; 以及视角调整子像素中的第二场失真装置。

公开(公告)号：US20070130033A1

公开(公告)日：2007-06-07

申请号：US11514472

申请日：2006-09-01

Applicant: Tae-Han Kim ,  Eun-Jin Cho ,  Hyun-Mi Baek ,  Jae-Ho Byun

Inventor： Tae-Han Kim ,  Eun-Jin Cho ,  Hyun-Mi Baek ,  Jae-Ho Byun

IPC: G07F19/00

CPC classification number: G06Q30/02 ,  G06Q30/0204 ,  G06Q30/0283 ,  G06Q40/12

Abstract: Provided are an apparatus for evaluating an indirect loss caused by a ubiquity effect by provision of a universal service, and a method thereof. The apparatus includes a first data storage unit for storing population statistics-related data, a second data storage unit for storing universal service offer-related data, a control unit for reading out and delivering required data from the first and second data storage units to a ubiquity loss calculation unit and controlling the ubiquity loss calculation unit, the ubiquity loss calculation unit for calculating a ubiquity loss of each evaluation object district by using the required data from the control unit, and a third data storage unit for storing the ubiquity loss of each evaluation object district calculated in the ubiquity loss calculation unit.

Abstract translation: 提供一种用于通过提供通用服务来评估由普遍性效应引起的间接损失的装置及其方法。 该装置包括用于存储总体统计数据相关数据的第一数据存储单元，用于存储通用服务提供相关数据的第二数据存储单元，用于从第一和第二数据存储单元读出并传送所需数据的控制单元， 无处不在丢失计算单元，并且控制无处不在丢失计算单元，用于通过使用来自控制单元的所需数据来计算每个评估对象区域的普遍性损失的无处不在丢失计算单元，以及用于存储每个评估对象区域的无处不在损失的第三数据存储单元 评估对象区在无处不在损失计算单位计算。

公开(公告)号：US08094282B1

公开(公告)日：2012-01-10

申请号：US13226214

申请日：2011-09-06

Applicant: Tae-Han Kim ,  In-Hyuk Song ,  Kyung-Eon Lee

Inventor： Tae-Han Kim ,  In-Hyuk Song ,  Kyung-Eon Lee

IPC: G02F1/1343 ,  G02F1/1333 ,  G02F1/13

CPC classification number: G02F1/133707 ,  G02F1/1323 ,  G02F1/133512 ,  G02F1/133514 ,  G02F2001/134345

Abstract: A liquid crystal display device includes: first and second substrates facing and spaced apart from each other, each of the first and second substrates having an image-displaying sub pixel and a viewing angle-adjusting sub pixel; a thin film transistor corresponding to each of the image-displaying sub pixel and the viewing angle-adjusting sub pixel; a liquid crystal display layer between the first and second substrates, the liquid crystal layer having a negative dielectric constant anisotropy; a first field distortion means in the image-displaying sub pixel; and a second field distortion means in the viewing angle-adjusting sub pixel.

Abstract translation: 液晶显示装置包括：面对并彼此分开的第一和第二基板，第一和第二基板中的每一个具有图像显示子像素和视角调整子像素; 对应于图像显示子像素和视角调整子像素中的每一个的薄膜晶体管; 在第一和第二基板之间的液晶显示层，液晶层具有负的介电常数各向异性; 图像显示子像素中的第一场失真装置; 以及视角调整子像素中的第二场失真装置。

公开(公告)号：US07820537B1

公开(公告)日：2010-10-26

申请号：US12616911

申请日：2009-11-12

Applicant: Tae-Han Kim

Inventor： Tae-Han Kim

IPC: H01L21/20 ,  H01L21/4763 ,  H01L21/44 ,  H01L21/461

CPC classification number: H01L21/76897 ,  H01L21/28061 ,  H01L21/28114 ,  H01L21/28247 ,  H01L29/4941

Abstract: A method for fabricating a semiconductor device includes forming a polysilicon layer, a barrier metal layer, and a conductive layer over a substrate, forming gate hard masks over the conductive layer, etching the conductive layer and the barrier metal layer using the gate hard masks to form barrier metal electrodes and metal gate electrodes having a line width smaller than that of the gate hard masks, etching the polysilicon layer to form gate patterns, each gate pattern including a stack structure of a polysilicon electrode, the barrier metal electrode, the metal gate electrode, and the gate hard mask, forming a gate spacer over the surface profile of the substrate structure, forming an insulation layer over the gate spacer, etching the insulation layer to form a contact hole between the gate patterns and burying a conductive material over the contact hole to form a landing plug contact.

Abstract translation: 一种制造半导体器件的方法包括在衬底上形成多晶硅层，阻挡金属层和导电层，在导电层上形成栅极硬掩模，使用栅极硬掩模蚀刻导电层和阻挡金属层， 形成具有小于栅极硬掩模的线宽的栅极金属电极和金属栅电极，蚀刻多晶硅层以形成栅极图案，每个栅极图案包括多晶硅电极的堆叠结构，阻挡金属电极，金属栅极 电极和栅极硬掩模，在衬底结构的表面轮廓上形成栅极间隔物，在栅极间隔物上形成绝缘层，蚀刻绝缘层，以在栅极图案之间形成接触孔，并在 接触孔形成着陆插头接触。