公开(公告)号：US08168531B2

公开(公告)日：2012-05-01

申请号：US12434072

申请日：2009-05-01

申请人： Tae-Wook Kang ,  Chang-Yong Jeong ,  Chang-Soo Kim ,  Chang-Su Seo ,  Moon-Hee Park

发明人： Tae-Wook Kang ,  Chang-Yong Jeong ,  Chang-Soo Kim ,  Chang-Su Seo ,  Moon-Hee Park

IPC分类号： H01L21/4763

CPC分类号： H01L29/41733 ,  H01L21/76804 ,  H01L27/124 ,  H01L27/1248 ,  H01L29/66757

摘要： A semiconductor device and method of fabricating the same, which forms a contact hole, a via hole or a via contact hole with multiple profiles with various taper angles. The semiconductor device includes a substrate, a thin film transistor formed on the substrate and having a semiconductor layer, a gate insulating layer, a gate electrode, and an interlayer dielectric, and a contact hole penetrating the gate insulating layer and the interlayer dielectric and exposing a portion of the semiconductor layer. The contact hole has a multiple profile in which an upper portion of the contact hole has a wet etch profile and a lower portion of the contact hole has at least one of the wet etch profile and a dry etch profile.

摘要翻译： 一种半导体器件及其制造方法，其形成具有多个锥形角的多个型材的接触孔，通孔或通孔接触孔。 所述半导体器件包括衬底，形成在所述衬底上并具有半导体层，栅极绝缘层，栅极电极和层间电介质的薄膜晶体管，以及穿过所述栅极绝缘层和所述层间电介质的接触孔和暴露 半导体层的一部分。 接触孔具有多个轮廓，其中接触孔的上部具有湿蚀刻轮廓，并且接触孔的下部具有湿蚀刻轮廓和干蚀刻轮廓中的至少一个。

公开(公告)号：US20120146143A1

公开(公告)日：2012-06-14

申请号：US13162836

申请日：2011-06-17

申请人： Tae-Wook KANG ,  Chang-Yong Jeong ,  Chang-Soo Kim ,  Chang-Su Seo ,  Moon-Hee Park

发明人： Tae-Wook KANG ,  Chang-Yong Jeong ,  Chang-Soo Kim ,  Chang-Su Seo ,  Moon-Hee Park

IPC分类号： H01L29/786 ,  H01L23/522

CPC分类号： H01L29/41733 ,  H01L21/76804 ,  H01L27/124 ,  H01L27/1248 ,  H01L29/66757

摘要： A semiconductor device and method of fabricating the same, which forms a contact hole, a via hole or a via contact hole with multiple profiles with various taper angles. The semiconductor device includes a substrate, a thin film transistor formed on the substrate and having a semiconductor layer, a gate insulating layer, a gate electrode, and an interlayer dielectric, and a contact hole penetrating the gate insulating layer and the interlayer dielectric and exposing a portion of the semiconductor layer. The contact hole has a multiple profile in which an upper portion of the contact hole has a wet etch profile and a lower portion of the contact hole has at least one of the wet etch profile and a dry etch profile.

摘要翻译： 一种半导体器件及其制造方法，其形成具有多个锥形角的多个型材的接触孔，通孔或通孔接触孔。 所述半导体器件包括衬底，形成在所述衬底上并具有半导体层，栅极绝缘层，栅极电极和层间电介质的薄膜晶体管，以及穿过所述栅极绝缘层和所述层间电介质的接触孔和暴露 半导体层的一部分。 接触孔具有多个轮廓，其中接触孔的上部具有湿蚀刻轮廓，并且接触孔的下部具有湿蚀刻轮廓和干蚀刻轮廓中的至少一个。

公开(公告)号：US07985992B2

公开(公告)日：2011-07-26

申请号：US12434048

申请日：2009-05-01

申请人： Tae-Wook Kang ,  Chang-Yong Jeong ,  Chang-Soo Kim ,  Chang-Su Seo ,  Moon-Hee Park

发明人： Tae-Wook Kang ,  Chang-Yong Jeong ,  Chang-Soo Kim ,  Chang-Su Seo ,  Moon-Hee Park

IPC分类号： H01L29/76

CPC分类号： H01L29/41733 ,  H01L21/76804 ,  H01L27/124 ,  H01L27/1248 ,  H01L29/66757

摘要： A semiconductor device and method of fabricating the same, which forms a contact hole, a via hole or a via contact hole with multiple profiles with various taper angles. The semiconductor device includes a substrate, a thin film transistor formed on the substrate and having a semiconductor layer, a gate insulating layer, a gate electrode, and an interlayer dielectric, and a contact hole penetrating the gate insulating layer and the interlayer dielectric and exposing a portion of the semiconductor layer. The contact hole has a multiple profile in which an upper portion of the contact hole has a wet etch profile and a lower portion of the contact hole has at least one of the wet etch profile and a dry etch profile.

摘要翻译： 一种半导体器件及其制造方法，其形成具有多个锥形角的多个型材的接触孔，通孔或通孔接触孔。 所述半导体器件包括衬底，形成在所述衬底上并具有半导体层，栅极绝缘层，栅极电极和层间电介质的薄膜晶体管，以及穿过所述栅极绝缘层和所述层间电介质的接触孔和暴露 半导体层的一部分。 接触孔具有多个轮廓，其中接触孔的上部具有湿蚀刻轮廓，并且接触孔的下部具有湿蚀刻轮廓和干蚀刻轮廓中的至少一个。

公开(公告)号：US20090275176A1

公开(公告)日：2009-11-05

申请号：US12434072

申请日：2009-05-01

申请人： Tae-Wook Kang ,  Chang-Yong Jeong ,  Chang-Soo Kim ,  Chang-Su Seo ,  Moon-Hee Park

发明人： Tae-Wook Kang ,  Chang-Yong Jeong ,  Chang-Soo Kim ,  Chang-Su Seo ,  Moon-Hee Park

IPC分类号： H01L21/336 ,  H01L21/20 ,  H01L21/768

CPC分类号： H01L29/41733 ,  H01L21/76804 ,  H01L27/124 ,  H01L27/1248 ,  H01L29/66757

摘要： A semiconductor device and method of fabricating the same, which forms a contact hole, a via hole or a via contact hole with multiple profiles with various taper angles. The semiconductor device includes a substrate, a thin film transistor formed on the substrate and having a semiconductor layer, a gate insulating layer, a gate electrode, and an interlayer dielectric, and a contact hole penetrating the gate insulating layer and the interlayer dielectric and exposing a portion of the semiconductor layer. The contact hole has a multiple profile in which an upper portion of the contact hole has a wet etch profile and a lower portion of the contact hole has at least one of the wet etch profile and a dry etch profile.

摘要翻译： 一种半导体器件及其制造方法，其形成具有多个锥形角的多个型材的接触孔，通孔或通孔接触孔。 所述半导体器件包括衬底，形成在所述衬底上并具有半导体层，栅极绝缘层，栅极电极和层间电介质的薄膜晶体管，以及穿过所述栅极绝缘层和所述层间电介质的接触孔以及暴露 半导体层的一部分。 接触孔具有多个轮廓，其中接触孔的上部具有湿蚀刻轮廓，并且接触孔的下部具有湿蚀刻轮廓和干蚀刻轮廓中的至少一个。

公开(公告)号：US08749069B2

公开(公告)日：2014-06-10

申请号：US13162836

申请日：2011-06-17

申请人： Tae-Wook Kang ,  Chang-Yong Jeong ,  Chang-Soo Kim ,  Chang-Su Seo ,  Moon-Hee Park

发明人： Tae-Wook Kang ,  Chang-Yong Jeong ,  Chang-Soo Kim ,  Chang-Su Seo ,  Moon-Hee Park

IPC分类号： H01L23/52

CPC分类号： H01L29/41733 ,  H01L21/76804 ,  H01L27/124 ,  H01L27/1248 ,  H01L29/66757

摘要： A semiconductor device and method of fabricating the same, which forms a contact hole, a via hole or a via contact hole with multiple profiles with various taper angles. The semiconductor device includes a substrate, a thin film transistor formed on the substrate and having a semiconductor layer, a gate insulating layer, a gate electrode, and an interlayer dielectric, and a contact hole penetrating the gate insulating layer and the interlayer dielectric and exposing a portion of the semiconductor layer. The contact hole has a multiple profile in which an upper portion of the contact hole has a wet etch profile and a lower portion of the contact hole has at least one of the wet etch profile and a dry etch profile.

摘要翻译： 一种半导体器件及其制造方法，其形成具有多个锥形角的多个型材的接触孔，通孔或通孔接触孔。 所述半导体器件包括衬底，形成在所述衬底上并具有半导体层，栅极绝缘层，栅极电极和层间电介质的薄膜晶体管，以及穿过所述栅极绝缘层和所述层间电介质的接触孔和暴露 半导体层的一部分。 接触孔具有多个轮廓，其中接触孔的上部具有湿蚀刻轮廓，并且接触孔的下部具有湿蚀刻轮廓和干蚀刻轮廓中的至少一个。

公开(公告)号：US20090212295A1

公开(公告)日：2009-08-27

申请号：US12434048

申请日：2009-05-01

申请人： Tae-Wook Kang ,  Chang-Yong Jeong ,  Chang-Soo Kim ,  Chang-Su Seo ,  Moon-Hee Park

发明人： Tae-Wook Kang ,  Chang-Yong Jeong ,  Chang-Soo Kim ,  Chang-Su Seo ,  Moon-Hee Park

IPC分类号： H01L29/786 ,  H01L23/48 ,  H01L29/78

CPC分类号： H01L29/41733 ,  H01L21/76804 ,  H01L27/124 ,  H01L27/1248 ,  H01L29/66757

摘要： A semiconductor device and method of fabricating the same, which forms a contact hole, a via hole or a via contact hole with multiple profiles with various taper angles. The semiconductor device includes a substrate, a thin film transistor formed on the substrate and having a semiconductor layer, a gate insulating layer, a gate electrode, and an interlayer dielectric, and a contact hole penetrating the gate insulating layer and the interlayer dielectric and exposing a portion of the semiconductor layer. The contact hole has a multiple profile in which an upper portion of the contact hole has a wet etch profile and a lower portion of the contact hole has at least one of the wet etch profile and a dry etch profile.

公开(公告)号：US20050260804A1

公开(公告)日：2005-11-24

申请号：US11134417

申请日：2005-05-23

申请人： Tae-Wook Kang ,  Chang-Yong Jeong ,  Chang-Soo Kim ,  Chang-Su Seo ,  Moon-Hee Park

发明人： Tae-Wook Kang ,  Chang-Yong Jeong ,  Chang-Soo Kim ,  Chang-Su Seo ,  Moon-Hee Park

IPC分类号： H01L21/00 ,  H01L21/336 ,  H01L21/4763 ,  H01L21/768 ,  H01L21/77 ,  H01L21/84 ,  H01L29/417

CPC分类号： H01L29/41733 ,  H01L21/76804 ,  H01L27/124 ,  H01L27/1248 ,  H01L29/66757

摘要： A semiconductor device and method of fabricating the same, which forms a contact hole, a via hole or a via contact hole with multiple profiles with various taper angles. The semiconductor device includes a substrate, a thin film transistor formed on the substrate and having a semiconductor layer, a gate insulating layer, a gate electrode, and an interlayer dielectric, and a contact hole penetrating the gate insulating layer and the interlayer dielectric and exposing a portion of the semiconductor layer. The contact hole has a multiple profile in which an upper portion of the contact hole has a wet etch profile and a lower portion of the contact hole has at least one of the wet etch profile and a dry etch profile.

摘要翻译： 一种半导体器件及其制造方法，其形成具有多个锥形角的多个型材的接触孔，通孔或通孔接触孔。 所述半导体器件包括衬底，形成在所述衬底上并具有半导体层，栅极绝缘层，栅极电极和层间电介质的薄膜晶体管，以及穿过所述栅极绝缘层和所述层间电介质的接触孔和暴露 半导体层的一部分。 接触孔具有多个轮廓，其中接触孔的上部具有湿蚀刻轮廓，并且接触孔的下部具有湿蚀刻轮廓和干蚀刻轮廓中的至少一个。

公开(公告)号：US20050285114A1

公开(公告)日：2005-12-29

申请号：US11145955

申请日：2005-06-07

申请人： Tae-Wook Kang ,  Chang-Soo Kim ,  Chang-Yong Jeong

发明人： Tae-Wook Kang ,  Chang-Soo Kim ,  Chang-Yong Jeong

IPC分类号： H05B33/26 ,  H01L27/32 ,  H01L29/04 ,  H01L51/52 ,  H05B33/10

CPC分类号： H01L51/5203 ,  H01L27/3244 ,  H01L51/5271

摘要： An electroluminescence display device including a thin film transistor layer formed on a substrate, at least one insulating layer, and a pixel layer that includes a first electrode layer, a second electrode layer, and an intermediate layer interposed between the first electrode layer and the second electrode layer and having at least an emitting layer. The pixel layer further includes a reflection layer that is disposed under the first electrode layer and that extends to a via hole formed in the insulating layer, and an auxiliary conductive layer is disposed under the reflection layer. The auxiliary conductive layer extends to the via hole, and the first electrode layer contacts at least a portion of the auxiliary conductive layer.

摘要翻译： 一种电致发光显示装置，其包括形成在基板上的薄膜晶体管层，至少一个绝缘层和像素层，所述像素层包括插入在所述第一电极层和所述第二电极层之间的第一电极层，第二电极层和中间层 电极层，并且具有至少一个发光层。 像素层还包括设置在第一电极层下方并延伸到形成在绝缘层中的通孔的反射层，并且辅助导电层设置在反射层下方。 辅助导电层延伸到通孔，并且第一电极层接触辅助导电层的至少一部分。

公开(公告)号：US20050263761A1

公开(公告)日：2005-12-01

申请号：US11124124

申请日：2005-05-09

申请人： Chang-Soo Kim ,  Tae-Wook Kang ,  Chang-Yong Jeong ,  Jae-Young Oh ,  Sang-Il Park ,  Seong-Moh Seo

发明人： Chang-Soo Kim ,  Tae-Wook Kang ,  Chang-Yong Jeong ,  Jae-Young Oh ,  Sang-Il Park ,  Seong-Moh Seo

IPC分类号： G02F1/1368 ,  G02F1/136 ,  G09F9/30 ,  H01L21/00 ,  H01L21/336 ,  H01L21/77 ,  H01L21/84 ,  H01L27/12 ,  H01L27/32 ,  H01L29/04 ,  H01L29/10 ,  H01L29/15 ,  H01L29/745 ,  H01L29/76 ,  H01L29/786 ,  H01L31/036 ,  H01L31/0376 ,  H01L31/20 ,  H01L51/52

CPC分类号： H01L29/78603 ,  H01L27/12 ,  H01L27/1248 ,  H01L27/3262 ,  H01L51/5284

摘要： A TFT having a dual buffer structure, a method of fabricating the same, and a flat panel display having the TFT, and a method of fabricating the same are provided. The TFT includes a first buffer layer formed of an amorphous silicon layer on a substrate, a second buffer layer formed on the first buffer layer. The TFT also includes a semiconductor layer formed on the second buffer layer and a gate electrode formed on the semiconductor layer. The dual buffer structure provides better barrier to impurities diffusing from the substrate, and also acts as a black matrix to reduce unwanted reflections and is a source of hydrogen to passivate other layers.

摘要翻译： 提供具有双缓冲结构的TFT及其制造方法，以及具有该TFT的平板显示器及其制造方法。 TFT包括由衬底上的非晶硅层形成的第一缓冲层，形成在第一缓冲层上的第二缓冲层。 TFT还包括形成在第二缓冲层上的半导体层和形成在半导体层上的栅电极。 双缓冲结构为从衬底扩散的杂质提供更好的屏障，并且还用作黑色矩阵以减少不必要的反射，并且是氢源来钝化其它层。

公开(公告)号：US07554118B2

公开(公告)日：2009-06-30

申请号：US11124124

申请日：2005-05-09

申请人： Chang-Soo Kim ,  Tae-Wook Kang ,  Chang-Yong Jeong ,  Jae-Young Oh ,  Sang-Il Park ,  Seong-Moh Seo

发明人： Chang-Soo Kim ,  Tae-Wook Kang ,  Chang-Yong Jeong ,  Jae-Young Oh ,  Sang-Il Park ,  Seong-Moh Seo

IPC分类号： H01L29/04 ,  H01L21/00

CPC分类号： H01L29/78603 ,  H01L27/12 ,  H01L27/1248 ,  H01L27/3262 ,  H01L51/5284

摘要： A TFT having a dual buffer structure, a method of fabricating the same, and a flat panel display having the TFT, and a method of fabricating the same are provided. The TFT includes a first buffer layer formed of an amorphous silicon layer on a substrate, a second buffer layer formed on the first buffer layer. The TFT also includes a semiconductor layer formed on the second buffer layer and a gate electrode formed on the semiconductor layer. The dual buffer structure provides better barrier to impurities diffusing from the substrate, and also acts as a black matrix to reduce unwanted reflections and is a source of hydrogen to passivate other layers.

摘要翻译： 提供具有双缓冲结构的TFT及其制造方法，以及具有该TFT的平板显示器及其制造方法。 TFT包括由衬底上的非晶硅层形成的第一缓冲层，形成在第一缓冲层上的第二缓冲层。 TFT还包括形成在第二缓冲层上的半导体层和形成在半导体层上的栅电极。 双缓冲结构为从衬底扩散的杂质提供更好的屏障，并且还用作黑色矩阵以减少不必要的反射，并且是氢源来钝化其它层。