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公开(公告)号:US20200243396A1
公开(公告)日:2020-07-30
申请号:US16853474
申请日:2020-04-20
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Ta-Chun Lin , Buo-Chin Hsu , Kuo-Hua Pan , Jhon Jhy Liaw , Chih-Yung Lin
IPC: H01L21/8234 , H01L29/06 , H01L21/311 , H01L21/3105 , H01L29/66 , H01L27/088
Abstract: A semiconductor structure includes a fin active region extruded from a semiconductor substrate; and a gate stack disposed on the fin active region. The gate stack includes a gate dielectric layer and a gate electrode disposed on the gate dielectric layer. The gate dielectric layer includes a first dielectric material. The semiconductor structure further includes a dielectric gate of a second dielectric material disposed on the fin active region. The gate dielectric layer extends from a sidewall of the gate electrode to a sidewall of the dielectric gate. The second dielectric material is different from the first dielectric material in composition.
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公开(公告)号:US20190333822A1
公开(公告)日:2019-10-31
申请号:US15964177
申请日:2018-04-27
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Ta-Chun Lin , Buo-Chin Hsu , Kuo-Hua Pan , Jhon Jhy Liaw , Chih-Yung Lin
IPC: H01L21/8234 , H01L27/088 , H01L29/06 , H01L29/66 , H01L21/3105 , H01L21/311
Abstract: A semiconductor structure includes a fin active region extruded from a semiconductor substrate; and a gate stack disposed on the fin active region. The gate stack includes a gate dielectric layer and a gate electrode disposed on the gate dielectric layer. The gate dielectric layer includes a first dielectric material. The semiconductor structure further includes a dielectric gate of a second dielectric material disposed on the fin active region. The gate dielectric layer extends from a sidewall of the gate electrode to a sidewall of the dielectric gate. The second dielectric material is different from the first dielectric material in composition.
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公开(公告)号:US11245034B2
公开(公告)日:2022-02-08
申请号:US15962181
申请日:2018-04-25
Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
Inventor: Kuei-Ming Chang , Ta-Chun Lin , Rei-Jay Hsieh , Yung-Chih Wang , Wen-Huei Guo , Kuo-Hua Pan , Buo-Chin Hsu
IPC: H01L29/78 , H01L29/66 , H01L21/8234 , H01L21/762 , H01L29/417
Abstract: A semiconductor device includes a substrate, first and second source/drain features, and a dielectric plug. The substrate has a semiconductor fin. The first and second source/drain features are over first and second portions of the semiconductor fin, respectively. The dielectric plug is at least partially embedded in a third portion of the semiconductor fin. The third portion is in between the first and second portions of the semiconductor fin. The dielectric plug includes a first dielectric material and a second dielectric material different from the first dielectric material.
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公开(公告)号:US20210272852A1
公开(公告)日:2021-09-02
申请号:US17246998
申请日:2021-05-03
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Ta-Chun Lin , Buo-Chin Hsu , Kuo-Hua Pan , Jhon Jhy Liaw , Chih-Yung Lin
IPC: H01L21/8234 , H01L27/088 , H01L29/06 , H01L21/311 , H01L29/66 , H01L21/3105
Abstract: A structure includes a fin on a substrate; first and second gate stacks over the fin and including first and second gate dielectric layers and first and second gate electrodes respectively; and a dielectric gate over the fin and between the first and second gate stacks. The dielectric gate includes a dielectric material layer on a third gate dielectric layer. In a cross-sectional view cut along a direction parallel to a lengthwise direction of the fin and offset from the fin, the first gate dielectric layer forms a first U shape, the third gate dielectric layer forms a second U shape, a portion of the first gate electrode is disposed within the first U shape, a portion of the dielectric material layer is disposed within the second U shape, and a portion of an interlayer dielectric layer is disposed laterally between the first and the second U shapes.
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公开(公告)号:US11791217B2
公开(公告)日:2023-10-17
申请号:US17246998
申请日:2021-05-03
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Ta-Chun Lin , Buo-Chin Hsu , Kuo-Hua Pan , Jhon Jhy Liaw , Chih-Yung Lin
IPC: H01L21/82 , H01L21/8234 , H01L27/088 , H01L29/06 , H01L21/311 , H01L29/66 , H01L21/3105
CPC classification number: H01L21/823462 , H01L21/31051 , H01L21/31105 , H01L21/823431 , H01L27/0886 , H01L29/0649 , H01L29/66545
Abstract: A structure includes a fin on a substrate; first and second gate stacks over the fin and including first and second gate dielectric layers and first and second gate electrodes respectively; and a dielectric gate over the fin and between the first and second gate stacks. The dielectric gate includes a dielectric material layer on a third gate dielectric layer. In a cross-sectional view cut along a direction parallel to a lengthwise direction of the fin and offset from the fin, the first gate dielectric layer forms a first U shape, the third gate dielectric layer forms a second U shape, a portion of the first gate electrode is disposed within the first U shape, a portion of the dielectric material layer is disposed within the second U shape, and a portion of an interlayer dielectric layer is disposed laterally between the first and the second U shapes.
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公开(公告)号:US11037831B2
公开(公告)日:2021-06-15
申请号:US16737447
申请日:2020-01-08
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Ta-Chun Lin , Buo-Chin Hsu , Kuo-Hua Pan , Jhon Jhy Liaw , Chih-Yung Lin
IPC: H01L21/8234 , H01L27/088 , H01L29/06 , H01L21/311 , H01L29/66 , H01L21/3105
Abstract: A semiconductor structure includes a fin active region extruded from a semiconductor substrate; and a gate stack disposed on the fin active region. The gate stack includes a gate dielectric layer and a gate electrode disposed on the gate dielectric layer. The gate dielectric layer includes a first dielectric material. The semiconductor structure further includes a dielectric gate of a second dielectric material disposed on the fin active region. The gate dielectric layer extends from a sidewall of the gate electrode to a sidewall of the dielectric gate. The second dielectric material is different from the first dielectric material in composition.
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公开(公告)号:US10998237B2
公开(公告)日:2021-05-04
申请号:US16853474
申请日:2020-04-20
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Ta-Chun Lin , Buo-Chin Hsu , Kuo-Hua Pan , Jhon Jhy Liaw , Chih-Yung Lin
IPC: H01L21/8234 , H01L27/088 , H01L29/06 , H01L21/311 , H01L29/66 , H01L21/3105
Abstract: A semiconductor structure includes a fin active region extruded from a semiconductor substrate; and a gate stack disposed on the fin active region. The gate stack includes a gate dielectric layer and a gate electrode disposed on the gate dielectric layer. The gate dielectric layer includes a first dielectric material. The semiconductor structure further includes a dielectric gate of a second dielectric material disposed on the fin active region. The gate dielectric layer extends from a sidewall of the gate electrode to a sidewall of the dielectric gate. The second dielectric material is different from the first dielectric material in composition.
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