公开(公告)号：US10714598B2

公开(公告)日：2020-07-14

申请号：US15801128

申请日：2017-11-01

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Tsan-Chun Wang ,  Chun-Feng Nieh ,  Chiao-Ting Tai

IPC: H01L29/66 ,  H01L21/266 ,  H01L21/265 ,  H01L29/78 ,  H01L21/28 ,  H01L29/51 ,  H01L29/49

Abstract: In a method for manufacturing a semiconductor device, fin structures each having an upper portion and a lower portion, are formed. The lower portion is embedded in an isolation insulating layer disposed over a substrate and the upper portion protrudes the isolation insulating layer. A gate dielectric layer is formed over the upper portion of each of the fin structures. A conductive layer is formed over the gate dielectric layer. A cap layer is formed over the conductive layer. An ion implantation operation is performed on the fin structures with the cap layer. The ion implantation operation is performed multiple times using different implantation angles to introduce ions into one side surface of each of the fin structures.

公开(公告)号：US11043580B2

公开(公告)日：2021-06-22

申请号：US16808689

申请日：2020-03-04

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Tsan-Chun Wang ,  Chun-Feng Nieh ,  Chiao-Ting Tai

IPC: H01L29/66 ,  H01L21/266 ,  H01L21/265 ,  H01L29/78 ,  H01L21/28 ,  H01L29/51 ,  H01L29/49

Abstract: In a method for manufacturing a semiconductor device, fin structures each having an upper portion and a lower portion, are formed. The lower portion is embedded in an isolation insulating layer disposed over a substrate and the upper portion protrudes the isolation insulating layer. A gate dielectric layer is formed over the upper portion of each of the fin structures. A conductive layer is formed over the gate dielectric layer. A cap layer is formed over the conductive layer. An ion implantation operation is performed on the fin structures with the cap layer. The ion implantation operation is performed multiple times using different implantation angles to introduce ions into one side surface of each of the fin structures.

公开(公告)号：US11127817B2

公开(公告)日：2021-09-21

申请号：US16121830

申请日：2018-09-05

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Tsan-Chun Wang ,  Chiao-Ting Tai ,  Che-Fu Chiu ,  Chun-Feng Nieh

IPC: H01L29/08 ,  H01L21/265 ,  H01L21/768 ,  H01L21/225 ,  H01L29/66 ,  H01L29/78

Abstract: A method for forming a semiconductor device structure is provided. The method includes forming a semiconductor structure over a semiconductor substrate. The method also includes implanting carbon into the semiconductor structure. The method further includes implanting gallium into the semiconductor structure. In addition, the method includes heating the semiconductor structure after the implanting of carbon and gallium.

公开(公告)号：US11031293B2

公开(公告)日：2021-06-08

申请号：US16656209

申请日：2019-10-17

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Tsan-Chun Wang ,  Chun-Feng Nieh ,  Chiao-Ting Tai

IPC: H01L21/8234 ,  H01L27/088 ,  H01L21/3115 ,  H01L21/265 ,  H01L29/51 ,  H01L21/28

Abstract: A method for fabricating a semiconductor device includes forming a fin extending along a first direction on a semiconductor substrate and forming a sacrificial gate electrode structure extending along a second direction substantially perpendicular to the first direction over the fin. The sacrificial gate electrode structure comprises a sacrificial gate dielectric layer and a sacrificial gate electrode layer disposed over the sacrificial gate dielectric layer. Opposing gate sidewall spacers are formed extending along the second direction, on opposing sides of the sacrificial gate electrode layer. The sacrificial gate electrode layer is removed to form a gate space. Fluorine is implanted into the gate sidewall spacers after removing the gate electrode layer by performing a first fluorine implantation. The sacrificial gate dielectric layer is removed and a high-k gate dielectric layer is formed in the gate space. Fluorine is implanted into the gate sidewall spacers and the fin after forming the high-k gate dielectric layer by performing a second fluorine implantation.

公开(公告)号：US11011428B2

公开(公告)日：2021-05-18

申请号：US16656247

申请日：2019-10-17

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Tsan-Chun Wang ,  Chun-Feng Nieh ,  Chiao-Ting Tai

IPC: H01L21/8234 ,  H01L21/265 ,  H01L21/3115 ,  H01L27/088 ,  H01L29/51 ,  H01L21/28

Abstract: A method for fabricating a semiconductor device includes forming a fin extending along a first direction on a semiconductor substrate and forming a sacrificial gate electrode structure extending along a second direction substantially perpendicular to the first direction over the fin. The sacrificial gate electrode structure comprises a sacrificial gate dielectric layer and a sacrificial gate electrode layer disposed over the sacrificial gate dielectric layer. Opposing gate sidewall spacers are formed extending along the second direction, on opposing sides of the sacrificial gate electrode layer. The sacrificial gate electrode layer is removed to form a gate space. Fluorine is implanted into the gate sidewall spacers after removing the gate electrode layer by performing a first fluorine implantation. The sacrificial gate dielectric layer is removed and a high-k gate dielectric layer is formed in the gate space. Fluorine is implanted into the gate sidewall spacers and the fin after forming the high-k gate dielectric layer by performing a second fluorine implantation.