公开(公告)号：US20200266295A1

公开(公告)日：2020-08-20

申请号：US15929547

申请日：2020-05-08

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Ker-Hsiao HUO ,  Kong-Beng THEI ,  Chien-Chih CHOU ,  Yi-Min CHEN ,  Chen-Liang CHU

IPC: H01L29/78 ,  H01L29/423 ,  H01L29/66 ,  H01L29/08 ,  H01L29/10

Abstract: A semiconductor device is provided. The semiconductor device comprises a substrate, a gate, a first doped region and a second doped region. The gate is over the substrate. The first doped region and the second doped region are in the substrate. The first doped region and the second doped region are of a same conductivity type and separated by the gate. The length of the first doped region is greater than a length of the second doped region in a direction substantially perpendicular to a channel length defined between the first doped region and the second doped region.

公开(公告)号：US20160308071A1

公开(公告)日：2016-10-20

申请号：US14690209

申请日：2015-04-17

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Meng-Han LIN ,  Chien-Chih CHOU ,  Chih-Wen HSIUNG ,  Kong-Beng THEI

IPC: H01L29/872 ,  H01L29/06 ,  H01L29/47 ,  H01L21/02 ,  H01L21/762 ,  H01L21/225 ,  H01L29/66 ,  H01L21/324

CPC classification number: H01L29/872 ,  H01L21/2253 ,  H01L21/2255 ,  H01L21/26513 ,  H01L21/28518 ,  H01L21/3115 ,  H01L21/762 ,  H01L21/76202 ,  H01L21/76224 ,  H01L29/0619 ,  H01L29/0623 ,  H01L29/0649 ,  H01L29/66143

Abstract: A method of manufacturing a Schottky barrier diode is provided, which includes: providing a semiconductor substrate including a first well region of a first conductivity type in the semiconductor substrate; forming a surface-doped layer having a dopant of a second conductivity type opposite to the first conductivity type in the first well region; forming a dielectric layer in contact with the surface-doped layer; performing a thermal treatment on the surface-doped layer to move the dopant of the surface-doped layer in the dielectric layer; removing the dielectric layer to expose the first well region; and forming a silicide layer in contact with the exposed first well region. A Schottky barrier diode is also provided.

Abstract translation: 提供一种制造肖特基势垒二极管的方法，其包括：在半导体衬底中提供包括第一导电类型的第一阱区的半导体衬底; 在所述第一阱区中形成具有与所述第一导电类型相反的第二导电类型的掺杂剂的表面掺杂层; 形成与表面掺杂层接触的介电层; 对所述表面掺杂层进行热处理，以移动所述介电层中的所述表面掺杂层的掺杂剂; 去除介电层以露出第一阱区; 以及形成与暴露的第一阱区域接触的硅化物层。 还提供肖特基势垒二极管。