公开(公告)号：US09048185B2

公开(公告)日：2015-06-02

申请号：US14456082

申请日：2014-08-11

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chih-Wei Chiang ,  Kuang-Cheng Wu ,  Wen-Long Lee ,  Po-Hsiung Leu ,  Ding-I Liu

IPC: H01L21/283 ,  H01L21/28 ,  H01L21/768 ,  H01L29/423 ,  H01L29/66 ,  H01L21/8234

CPC classification number: H01L21/28132 ,  H01L21/28114 ,  H01L21/76834 ,  H01L21/823425 ,  H01L21/823437 ,  H01L21/823468 ,  H01L21/823481 ,  H01L29/42376 ,  H01L29/66545

Abstract: Some embodiments relate to an integrated circuit (IC). The IC includes a semiconductor substrate having an upper surface with a source region and drain region proximate thereto. A channel region is disposed in the substrate between the source region and the drain region. A gate electrode is disposed over the channel region and separated from the channel region by a gate dielectric. Sidewall spacers are formed about opposing sidewalls of the gate electrode. Upper outer edges of the sidewall spacers extend outward beyond corresponding lower outer edges of the sidewall spacers. A liner is disposed about opposing sidewalls of the sidewall spacers and has a first thickness at an upper portion of liner and a second thickness at a lower portion of the liner. The first thickness is less than the second thickness. Other embodiments are also disclosed.

Abstract translation: 一些实施例涉及集成电路（IC）。 IC包括具有上表面的半导体衬底，源表面和漏区附近。 在源极区域和漏极区域之间的衬底中设置沟道区域。 栅电极设置在沟道区上方并通过栅极电介质与沟道区分离。 侧壁间隔件围绕栅电极的相对侧壁形成。 侧壁间隔件的上外边缘向外延伸超过侧壁间隔件的相应的下外边缘。 衬套设置在侧壁间隔物的相对侧壁周围，并且在衬垫的上部具有第一厚度，在衬垫的下部具有第二厚度。 第一厚度小于第二厚度。 还公开了其他实施例。

公开(公告)号：US10164063B2

公开(公告)日：2018-12-25

申请号：US15434343

申请日：2017-02-16

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chih-Wei Chiang ,  Po-Hsiung Leu ,  Ding-I Liu

IPC: H01L29/78 ,  H01L21/82 ,  H01L29/66 ,  H01L29/423 ,  H01L29/49 ,  H01L27/088 ,  H01L21/8234

Abstract: The method for forming a semiconductor structure includes forming a protection layer having a first portion and a second portion over a substrate and forming a dummy gate layer over the first portion and the second portion of the protection layer. The method for forming a semiconductor structure further includes patterning the dummy gate layer to form a dummy gate structure over the first portion of the protection layer and forming a spacer on a sidewall of the dummy gate structure over a second portion of the protection layer. The method for forming a semiconductor structure further includes replacing the first portion of the protection layer and the dummy gate structure by a gate dielectric layer and a gate electrode layer. In addition, a thickness of the protection layer is greater than a thickness of the gate dielectric layer.

公开(公告)号：US20140349471A1

公开(公告)日：2014-11-27

申请号：US14456082

申请日：2014-08-11

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chih-Wei Chiang ,  Kuang-Cheng Wu ,  Wen-Long Lee ,  Po-Hsiung Leu ,  Ding-I Liu

IPC: H01L21/28 ,  H01L21/8234 ,  H01L29/66

CPC classification number: H01L21/28132 ,  H01L21/28114 ,  H01L21/76834 ,  H01L21/823425 ,  H01L21/823437 ,  H01L21/823468 ,  H01L21/823481 ,  H01L29/42376 ,  H01L29/66545

Abstract: Some embodiments relate to an integrated circuit (IC). The IC includes a semiconductor substrate having an upper surface with a source region and drain region proximate thereto. A channel region is disposed in the substrate between the source region and the drain region. A gate electrode is disposed over the channel region and separated from the channel region by a gate dielectric. Sidewall spacers are formed about opposing sidewalls of the gate electrode. Upper outer edges of the sidewall spacers extend outward beyond corresponding lower outer edges of the sidewall spacers. A liner is disposed about opposing sidewalls of the sidewall spacers and has a first thickness at an upper portion of liner and a second thickness at a lower portion of the liner. The first thickness is less than the second thickness. Other embodiments are also disclosed.

Abstract translation: 一些实施例涉及集成电路（IC）。 IC包括具有上表面的半导体衬底，源表面和漏区附近。 在源极区域和漏极区域之间的衬底中设置沟道区域。 栅电极设置在沟道区上方并通过栅极电介质与沟道区分离。 侧壁间隔件围绕栅电极的相对侧壁形成。 侧壁间隔件的上外边缘向外延伸超过侧壁间隔件的相应的下外边缘。 衬套设置在侧壁间隔物的相对侧壁周围，并且在衬垫的上部具有第一厚度，在衬垫的下部具有第二厚度。 第一厚度小于第二厚度。 还公开了其他实施例。