公开(公告)号：US11101354B2

公开(公告)日：2021-08-24

申请号：US16983369

申请日：2020-08-03

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Gulbagh Singh ,  Cheng-Yeh Huang ,  Chin-Nan Chang ,  Chih-Ming Lee ,  Chi-Yen Lin

IPC: H01L29/40 ,  H01L21/762 ,  H01L21/768 ,  H01L21/324 ,  H01L29/45 ,  H01L21/265

Abstract: A method for forming a semiconductor device structure is provided. The method includes providing a semiconductor substrate. The method includes forming an isolation structure in the semiconductor substrate. The isolation structure surrounds a first active region of the semiconductor substrate. The method includes forming a semiconductor strip structure over the semiconductor substrate. The semiconductor strip structure extends across the first active region and extends over the isolation structure, the semiconductor strip structure has a first doped region and a spacing region connected to the first doped region, the first doped region extends across the first active region, the spacing region is over the isolation structure, and the spacing region is an undoped region. The method includes performing an implantation process over the spacing region. The method includes forming a metal silicide layer over the semiconductor strip structure to continuously cover the first doped region and the spacing region.

公开(公告)号：US10991688B2

公开(公告)日：2021-04-27

申请号：US16199251

申请日：2018-11-26

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Victor Chiang Liang ,  Chi-Feng Huang ,  Chia-Chung Chen ,  Chun-Pei Wu ,  Fu-Huan Tsai ,  Chung-Hao Chu ,  Chin-Nan Chang ,  Ching-Yu Yang ,  Ankush Chaudhary

IPC: H01L21/02 ,  H01L27/088 ,  H01L21/8234 ,  H01L29/78 ,  H01L29/10 ,  H01L29/08 ,  H01L21/28

Abstract: A semiconductor device and a method of manufacturing the same are provided. The semiconductor device includes a gate stack, a first doped region, a second doped region, and a buried doped region. The first doped region has a first conductivity type and is located in the substrate at a first side of the gate stack. The second doped region has the first conductivity type and is located in the substrate at a second side of the gate stack. The buried doped region has the first conductivity type and is buried in the substrate, extended from the first doped region to the second doped region, and separated from the gate stack by a distance.

公开(公告)号：US20190109132A1

公开(公告)日：2019-04-11

申请号：US16199251

申请日：2018-11-26

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Victor Chiang Liang ,  Chi-Feng Huang ,  Chia-Chung Chen ,  Chun-Pei Wu ,  Fu-Huan Tsai ,  Chung-Hao Chu ,  Chin-Nan Chang ,  Ching-Yu Yang ,  Ankush Chaudhary

IPC: H01L27/088 ,  H01L21/8234 ,  H01L29/10 ,  H01L29/78 ,  H01L29/08 ,  H01L21/266 ,  H01L21/265 ,  H01L21/02

Abstract: A semiconductor device and a method of manufacturing the same are provided. The semiconductor device includes a gate stack, a first doped region, a second doped region, and a buried doped region. The first doped region has a first conductivity type and is located in the substrate at a first side of the gate stack. The second doped region has the first conductivity type and is located in the substrate at a second side of the gate stack. The buried doped region has the first conductivity type and is buried in the substrate, extended from the first doped region to the second doped region, and separated from the gate stack by a distance.

公开(公告)号：US10157916B2

公开(公告)日：2018-12-18

申请号：US15482829

申请日：2017-04-10

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Victor Chiang Liang ,  Chi-Feng Huang ,  Chia-Chung Chen ,  Chun-Pei Wu ,  Fu-Huan Tsai ,  Chung-Hao Chu Chu ,  Chin-Nan Chang ,  Ching-Yu Yang ,  Ankush Chaudhary

IPC: H01L21/02 ,  H01L27/088 ,  H01L21/265 ,  H01L21/8234 ,  H01L21/266 ,  H01L29/08 ,  H01L29/78 ,  H01L29/10

Abstract: Provided is a semiconductor device includes a gate stack, a first doped region, a second doped region, a first lightly doped region and a second lightly doped region. The gate stack is disposed on a substrate. The first doped region is located in the substrate at a first side of the gate stack. The second doped region is located in the substrate at a second side of the gate stack. The first lightly doped region is located in the substrate between the gate stack and the first doped region. The second lightly doped region is located in the substrate between the gate stack and the second doped region. A property of the first lightly doped region is different from a property of the second lightly doped region.

公开(公告)号：US10734489B2

公开(公告)日：2020-08-04

申请号：US16179165

申请日：2018-11-02

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Gulbagh Singh ,  Cheng-Yeh Huang ,  Chin-Nan Chang ,  Chih-Ming Lee ,  Chi-Yen Lin

IPC: H01L29/40 ,  H01L21/762 ,  H01L21/768 ,  H01L21/324 ,  H01L29/45 ,  H01L21/265

Abstract: A method for forming a semiconductor device structure is provided. The method includes providing a semiconductor substrate. The method includes forming an isolation structure in the semiconductor substrate. The isolation structure surrounds a first active region and a second active region of the semiconductor substrate. The method includes forming a semiconductor strip structure over the semiconductor substrate. The semiconductor strip structure extends across the first active region, the second active region, and the isolation structure between the first active region and the second active region, the semiconductor strip structure has a P-type doped region, an N-type doped region, and a spacing region. The method includes performing an implantation process over the spacing region. The method includes forming a metal silicide layer over the semiconductor strip structure to cover the P-type doped region, the N-type doped region, and the spacing region.

公开(公告)号：US20180294261A1

公开(公告)日：2018-10-11

申请号：US15482829

申请日：2017-04-10

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Victor Chiang Liang ,  Chi-Feng Huang ,  Chia-Chung Chen ,  Chun-Pei Wu ,  Fu-Huan Tsai ,  Chung-Hao Chu Chu ,  Chin-Nan Chang ,  Ching-Yu Yang ,  Ankush Chaudhary

IPC: H01L27/088 ,  H01L21/265 ,  H01L21/8234 ,  H01L21/266 ,  H01L21/02 ,  H01L29/08 ,  H01L29/78 ,  H01L29/10

CPC classification number: H01L27/088 ,  H01L21/0223 ,  H01L21/26513 ,  H01L21/266 ,  H01L21/823418 ,  H01L21/823462 ,  H01L29/0847 ,  H01L29/1095 ,  H01L29/7833

Abstract: Provided is a semiconductor device includes a gate stack, a first doped region, a second doped region, a first lightly doped region and a second lightly doped region. The gate stack is disposed on a substrate. The first doped region is located in the substrate at a first side of the gate stack. The second doped region is located in the substrate at a second side of the gate stack. The first lightly doped region is located in the substrate between the gate stack and the first doped region. The second lightly doped region is located in the substrate between the gate stack and the second doped region. A property of the first lightly doped region is different from a property of the second lightly doped region.

公开(公告)号：US11088136B2

公开(公告)日：2021-08-10

申请号：US16799849

申请日：2020-02-25

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Victor Chiang Liang ,  Chi-Feng Huang ,  Chia-Chung Chen ,  Chun-Pei Wu ,  Fu-Huan Tsai ,  Chung-Hao Chu ,  Chin-Nan Chang ,  Ching-Yu Yang ,  Ankush Chaudhary

IPC: H01L21/02 ,  H01L27/088 ,  H01L21/8234 ,  H01L29/78 ,  H01L29/10 ,  H01L29/08 ,  H01L21/28

Abstract: A semiconductor device and method of forming the same are provided. The semiconductor device includes a substrate, a growth promoting region, a first gate stack, and a second gate stack. The substrate includes a first region and a second region. The growth promoting region is located in a surface of the substrate in the first region. The growth promoting region includes a first implantation species, and a surface of the substrate in the second region is free of the first implantation species. The first gate stack includes a first gate dielectric layer on the substrate in the first region. The second gate stack includes a second gate dielectric layer on the substrate in the second region.

公开(公告)号：US20190096881A1

公开(公告)日：2019-03-28

申请号：US16199248

申请日：2018-11-26

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Victor Chiang Liang ,  Chi-Feng Huang ,  Chia-Chung Chen ,  Chun-Pei Wu ,  Fu-Huan Tsai ,  Chung-Hao Chu ,  Chin-Nan Chang ,  Ching-Yu Yang ,  Ankush Chaudhary

IPC: H01L27/088 ,  H01L21/8234 ,  H01L21/02 ,  H01L21/266 ,  H01L21/265 ,  H01L29/08 ,  H01L29/10 ,  H01L29/78

Abstract: Provided is a semiconductor device includes a gate stack, a first doped region, a second doped region, a first lightly doped region and a second lightly doped region. The gate stack is disposed on a substrate. The first doped region is located in the substrate at a first side of the gate stack. The second doped region is located in the substrate at a second side of the gate stack. The first lightly doped region is located in the substrate between the gate stack and the first doped region. The second lightly doped region is located in the substrate between the gate stack and the second doped region. A property of the first lightly doped region is different from a property of the second lightly doped region.