公开(公告)号：US12154608B2

公开(公告)日：2024-11-26

申请号：US18366779

申请日：2023-08-08

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Bo-Jhih Shen ,  Kuang-I Liu ,  Joung-Wei Liou ,  Jinn-Kwei Liang ,  Yi-Wei Chiu ,  Chin-Hsing Lin ,  Li-Te Hsu ,  Han-Ting Tsai ,  Cheng-Yi Wu ,  Shih-Ho Lin

IPC: H10N50/01 ,  G11C11/16 ,  H10B61/00 ,  H10N50/10 ,  H10N50/85 ,  G01R33/09 ,  G11B5/39

Abstract: A semiconductor device and a method of forming the same are provided. The method includes forming a bottom electrode layer over a substrate. A magnetic tunnel junction (MTJ) layers are formed over the bottom electrode layer. A top electrode layer is formed over the MTJ layers. The top electrode layer is patterned. After patterning the top electrode layer, one or more process cycles are performed on the MTJ layers and the bottom electrode layer. A patterned top electrode layer, patterned MTJ layers and a patterned bottom electrode layer form MTJ structures. Each of the one or more process cycles includes performing an etching process on the MTJ layers and the bottom electrode layer for a first duration and performing a magnetic treatment on the MTJ layers and the bottom electrode layer for a second duration.

公开(公告)号：US11990167B2

公开(公告)日：2024-05-21

申请号：US17352658

申请日：2021-06-21

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Bo-Jhih Shen ,  Kuang-I Liu ,  Joung-Wei Liou ,  Jinn-Kwei Liang ,  Yi-Wei Chiu ,  Chin-Hsing Lin ,  Li-Te Hsu ,  Han-Ting Tsai ,  Cheng-Yi Wu ,  Shih-Ho Lin

IPC: G11C11/16 ,  H10B61/00 ,  H10N50/01 ,  H10N50/10 ,  H10N50/85 ,  G01R33/09 ,  G11B5/39

CPC classification number: G11C11/161 ,  H10B61/00 ,  H10N50/01 ,  H10N50/10 ,  H10N50/85 ,  G01R33/098 ,  G11B5/3909 ,  G11C2211/5615

Abstract: A semiconductor device and a method of forming the same are provided. The method includes forming a bottom electrode layer over a substrate. A magnetic tunnel junction (MTJ) layers are formed over the bottom electrode layer. A top electrode layer is formed over the MTJ layers. The top electrode layer is patterned. After patterning the top electrode layer, one or more process cycles are performed on the MTJ layers and the bottom electrode layer. A patterned top electrode layer, patterned MTJ layers and a patterned bottom electrode layer form MTJ structures. Each of the one or more process cycles includes performing an etching process on the MTJ layers and the bottom electrode layer for a first duration and performing a magnetic treatment on the MTJ layers and the bottom electrode layer for a second duration.

公开(公告)号：US20210312965A1

公开(公告)日：2021-10-07

申请号：US17352658

申请日：2021-06-21

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Bo-Jhih Shen ,  Kuang-I Liu ,  Joung-Wei Liou ,  Jinn-Kwei Liang ,  Yi-Wei Chiu ,  Chin-Hsing Lin ,  Li-Te Hsu ,  Han-Ting Tsai ,  Cheng-Yi Wu ,  Shih-Ho Lin

IPC: G11C11/16 ,  H01L27/22 ,  H01L43/12 ,  H01L43/10 ,  H01L43/08

Abstract: A semiconductor device and a method of forming the same are provided. The method includes forming a bottom electrode layer over a substrate. A magnetic tunnel junction (MTJ) layers are formed over the bottom electrode layer. A top electrode layer is formed over the MTJ layers. The top electrode layer is patterned. After patterning the top electrode layer, one or more process cycles are performed on the MTJ layers and the bottom electrode layer. A patterned top electrode layer, patterned MTJ layers and a patterned bottom electrode layer form MTJ structures. Each of the one or more process cycles includes performing an etching process on the MTJ layers and the bottom electrode layer for a first duration and performing a magnetic treatment on the MTJ layers and the bottom electrode layer for a second duration.

公开(公告)号：US20240021230A1

公开(公告)日：2024-01-18

申请号：US18366779

申请日：2023-08-08

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Bo-Jhih Shen ,  Kuang-I Liu ,  Joung-Wei Liou ,  Jinn-Kwei Liang ,  Yi-Wei Chiu ,  Chin-Hsing Lin ,  Li-Te Hsu ,  Han-Ting Tsai ,  Cheng-Yi Wu ,  Shih-Ho Lin

IPC: G11C11/16 ,  H10B61/00 ,  H10N50/01 ,  H10N50/10 ,  H10N50/85

CPC classification number: G11C11/161 ,  H10B61/00 ,  H10N50/01 ,  H10N50/10 ,  H10N50/85 ,  G11C2211/5615 ,  G11B5/3909

Abstract: A semiconductor device and a method of forming the same are provided. The method includes forming a bottom electrode layer over a substrate. A magnetic tunnel junction (MTJ) layers are formed over the bottom electrode layer. A top electrode layer is formed over the MTJ layers. The top electrode layer is patterned. After patterning the top electrode layer, one or more process cycles are performed on the MTJ layers and the bottom electrode layer. A patterned top electrode layer, patterned MTJ layers and a patterned bottom electrode layer form MTJ structures. Each of the one or more process cycles includes performing an etching process on the MTJ layers and the bottom electrode layer for a first duration and performing a magnetic treatment on the MTJ layers and the bottom electrode layer for a second duration.