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    Integrated fan-out package
    2.
    发明授权
    Integrated fan-out package 有权

    公开(公告)号：US11004796B2

    公开(公告)日：2021-05-11

    申请号：US16513729

    申请日：2019-07-17

    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

    Inventor： Meng-Che Tu ,  Hung-Jui Kuo ,  Yu-Hsiang Hu ,  Sih-Hao Liao

    IPC: H01L23/538 ,  H01L23/00 ,  H01L25/065 ,  H01L23/28 ,  H01Q1/22

    Abstract: An integrated fan-out (InFO) package includes a first redistribution structure, a die, an encapsulant, a plurality of through insulating vias (TIV), a plurality of dipole antennas, and a second redistribution structure. The die is disposed on the first redistribution structure. The encapsulant encapsulates the die. The TIVs and the dipole antennas are embedded in the encapsulant. Each dipole antenna includes a pair of antenna elements. Each antenna element has a first folded-sidewall and a second folded-sidewall opposite to the first folded-sidewall. A portion of each second folded-sidewall in the pair of antenna elements face each other. Each first folded-sidewall includes at least three sub-sidewalls connected to each other. The adjacent sub-sidewalls form an obtuse angle. The second redistribution structure is disposed on the die, the TIVs, the dipole antennas, and the encapsulant.

    INTEGRATED FAN-OUT PACKAGE
    3.
    发明申请
    INTEGRATED FAN-OUT PACKAGE 有权

    公开(公告)号：US20210020575A1

    公开(公告)日：2021-01-21

    申请号：US16513729

    申请日：2019-07-17

    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

    Inventor： Meng-Che Tu ,  Hung-Jui Kuo ,  Yu-Hsiang Hu ,  Sih-Hao Liao

    IPC: H01L23/538 ,  H01L23/00 ,  H01L25/065 ,  H01L23/28 ,  H01Q1/22

    Abstract: An integrated fan-out (InFO) package includes a first redistribution structure, a die, an encapsulant, a plurality of through insulating vias (TIV), a plurality of dipole antennas, and a second redistribution structure. The die is disposed on the first redistribution structure. The encapsulant encapsulates the die. The TIVs and the dipole antennas are embedded in the encapsulant. Each dipole antenna includes a pair of antenna elements. Each antenna element has a first folded-sidewall and a second folded-sidewall opposite to the first folded-sidewall. A portion of each second folded-sidewall in the pair of antenna elements face each other. Each first folded-sidewall includes at least three sub-sidewalls connected to each other. The adjacent sub-sidewalls form an obtuse angle. The second redistribution structure is disposed on the die, the TIVs, the dipole antennas, and the encapsulant.

    SEMICONDUCTOR PACKAGE AND METHODS OF FORMING THE SAME
    5.
    发明申请
    SEMICONDUCTOR PACKAGE AND METHODS OF FORMING THE SAME 有权

    公开(公告)号：US20250133812A1

    公开(公告)日：2025-04-24

    申请号：US19002409

    申请日：2024-12-26

    Applicant: Taiwan Semiconductor Manufacturing Co, Ltd.

    Inventor： Meng-Che Tu ,  Wei-Chih Chen ,  Sih-Hao Liao ,  Yu-Hsiang Hu ,  Hung-Jui Kuo ,  Chen-Hua Yu

    IPC: H10D84/01 ,  H01L21/56 ,  H01L23/00 ,  H01L23/31

    Abstract: A method of forming a semiconductor device includes forming a first dielectric layer over a front side of a wafer, the wafer having a plurality of dies at the front side of the wafer, the first dielectric layer having a first shrinkage ratio smaller than a first pre-determined threshold; curing the first dielectric layer at a first temperature, where after curing the first dielectric layer, a first distance between a highest point of an upper surface of the first dielectric layer and a lowest point of the upper surface of the first dielectric layer is smaller than a second pre-determined threshold; thinning the wafer from a backside of the wafer; and performing a dicing process to separate the plurality of dies into individual dies.

    Semiconductor package and methods of forming the same
    9.
    发明授权
    Semiconductor package and methods of forming the same 有权

    公开(公告)号：US12218009B2

    公开(公告)日：2025-02-04

    申请号：US18363458

    申请日：2023-08-01

    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

    Inventor： Meng-Che Tu ,  Wei-Chih Chen ,  Sih-Hao Liao ,  Yu-Hsiang Hu ,  Hung-Jui Kuo ,  Chen-Hua Yu

    IPC: H01L21/82 ,  H01L21/56 ,  H01L23/00 ,  H01L23/31

    Abstract: A method of forming a semiconductor device includes forming a first dielectric layer over a front side of a wafer, the wafer having a plurality of dies at the front side of the wafer, the first dielectric layer having a first shrinkage ratio smaller than a first pre-determined threshold; curing the first dielectric layer at a first temperature, where after curing the first dielectric layer, a first distance between a highest point of an upper surface of the first dielectric layer and a lowest point of the upper surface of the first dielectric layer is smaller than a second pre-determined threshold; thinning the wafer from a backside of the wafer; and performing a dicing process to separate the plurality of dies into individual dies.

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