公开(公告)号：US20230163197A1

公开(公告)日：2023-05-25

申请号：US18158641

申请日：2023-01-24

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Wan-Yi Kao ,  Chunyao Wang ,  Yung-Cheng Lu ,  Yong-Yan Lu ,  Ming-Han Chung

IPC: H01L29/66 ,  H01L29/06 ,  H01L29/423 ,  H01L29/49 ,  H01L21/02 ,  H01L29/786

CPC classification number: H01L29/66553 ,  H01L21/0228 ,  H01L21/02167 ,  H01L21/02211 ,  H01L21/02603 ,  H01L29/0673 ,  H01L29/4983 ,  H01L29/42392 ,  H01L29/66742 ,  H01L29/78696

Abstract: Semiconductor devices and methods of manufacturing are presented in which a first spacer layer and a second spacer layer are formed. In embodiments the first spacer layer and the second spacer layer are formed with an enhanced etch resistance. Such an enhanced etch resistance works to help prevent undesired breakthroughs during subsequent manufacturing processes.